Electronic Substrate Layout With Fewer Photomasks and Stronger Data Lines

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Solution Overview

Problem

The manufacturing of display devices requires multiple photomasks, increasing costs and is prone to signal line breakage due to reduced line widths for higher resolution, which affects the aperture ratio and product yield.

Innovation Solution

An electronic substrate design where the active layer, source, and drain are formed from a single semiconductor material layer, eliminating the need for extra metal layers and reducing the number of photomasks, thereby lowering manufacturing costs and minimizing signal line breakage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If multiple photomasks are used to manufacture array circuits, then manufacturing precision can be maintained, but manufacturing cost increases and device complexity increases

Engineering Contradiction:
Improvearray circuit manufacturing precisionVSAvoidmanufacturing process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent merges the formation of source and drain electrodes with the semiconductor layer formation by using the same photomask pattern. The semiconductor material is deposited to form both the active layer and source/drain regions in a single step, eliminating the need for separate metal layer deposition and reducing the number of photomasks required from 9 to 6.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The semiconductor material layer serves multiple functions simultaneously: it forms the active layer for transistor operation, creates the source and drain regions, and provides electrical connection paths. This multi-functionality reduces the number of separate manufacturing steps and photomasks needed.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Measurement precision

If line width of signal lines is reduced to maintain aperture ratio, then resolution increases, but reliability deteriorates due to signal line breakage

Engineering Contradiction:
Improvedisplay resolutionVSAvoidsignal line reliability
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent combines the signal line formation with the transistor electrode formation by using the same metal layer and photomask pattern. This integrated approach ensures that signal lines and transistor electrodes are formed simultaneously with consistent manufacturing control, reducing the risk of breakage while maintaining fine line widths for high resolution.

Inventive Principle:
Principle #5Merging (Combining)

3Adaptability or versatility

If extra metal layers are added to form source and drain, then device functionality is ensured, but manufacturing cost increases and device complexity increases

Engineering Contradiction:
Improvetransistor functionalityVSAvoidlayer structure complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The semiconductor material layer performs multiple functions: it acts as the active layer for charge carrier transport, forms the source and drain regions for electrical connection, and provides the conductive paths needed for transistor operation. This eliminates the need for separate metal layers for source and drain while ensuring complete transistor functionality.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent changes the electrical parameters of the semiconductor material by controlling its doping concentration and crystalline structure. By adjusting these parameters, the semiconductor layer achieves the required conductivity for source and drain regions while maintaining its semiconducting properties in the active layer region, all within a single material layer.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20260079370A1Electronic substrate and method of manufacturing the same
Publication Date: 2026.03.19 INNOLUX CORP
  • US20260079370A1 patent drawing
  • US20260079370A1 patent drawing
  • US20260079370A1 patent drawing

AI summary

An electronic substrate and a method of manufacturing the same are provided. The electronic substrate includes a substrate, a transistor, a data line, and a conductive element. The transistor is disposed on the substrate, and the transistor includes an active layer, a source, a drain, and a gate disposed on the active layer, in which the active layer is disposed between the source and the drain and overlaps the gate, and the active layer, the source, and the drain are formed of a semiconductor material layer. The data line is disposed on the substrate and electrically connected to the transistor. The conductive element is disposed on the data line and the semiconductor material layer and electrically connected to the data line and the source.