Electrophoretic Display Driving Method for TFT Stability
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Solution Overview
Problem
Electrophoretic display devices experience characteristic degradation and increased power consumption due to gate bias stress on thin film transistors (TFTs) during the sleep-mode, leading to threshold voltage changes and off-current issues, while also being susceptible to static electricity.
Innovation Solution
A reference voltage generating circuit and driving method that includes a data driving circuit, gate driving circuit, and controller to manage voltages during data updating and sleep-mode periods, raising impedance or grounding data and gate lines to reduce stress and power consumption, and protect against static electricity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by stationary object
If gate low voltage is supplied in sleep-mode for a long time to maintain display state, then power consumption is reduced, but TFT characteristics are degraded leading to threshold voltage changes and increased off current
Solution Approach 1:
The patent implements periodic action by alternating between sleep-mode (gate low voltage applied) and wake-mode (gate high voltage applied) states. During sleep-mode, the gate low voltage maintains the electrophoretic display state while consuming minimal power. When wake-event occurs, the system transitions to wake-mode to refresh the display and update data. This periodic switching allows the system to maintain low power consumption during idle periods while periodically restoring full functionality, thereby resolving the contradiction between continuous low power consumption and TFT characteristic stability.
Solution Approach 2:
The patent applies preliminary action by pre-establishing the sleep-mode operation with gate low voltage before any wake-event occurs. The system is designed to automatically transition from sleep-mode to wake-mode when necessary (e.g., user interaction, time-based triggers). This preliminary setup allows the system to operate at low power consumption continuously, with the understanding that TFT characteristics may drift during extended sleep periods, but the system is prepared to handle these transitions smoothly through predefined wake-up protocols.
2Use of energy by stationary object
If gate low voltage is applied during sleep-mode to maintain display state, then power consumption is reduced, but static electricity accumulation occurs on the display surface
Solution Approach 1:
The patent converts the harmful effect of static electricity accumulation into a beneficial feature by utilizing the electrophoretic display's inherent charge-based operation. The same electrophoretic mechanism that enables the display to maintain its state during sleep-mode also provides a controlled pathway for charge dissipation. By designing the wake-mode protocol to include controlled voltage transitions and data updates, the system creates a mechanism where static charges are deliberately managed and dissipated during the wake-up process, transforming the potential harm of static electricity into a controlled feature of the display operation.
3Manufacturing precision
If data is updated through reset period, stabilization period, and data writing period, then display accuracy is improved, but update time is increased
Solution Approach 1:
The patent implements periodic action by organizing the data update process into distinct temporal phases: reset period, stabilization period, and data writing period. These phases are executed in sequence during wake-mode operations, allowing the system to maintain high display accuracy through thorough initialization and stabilization while managing update time through efficient phasing. The periodic nature of these updates, combined with the ability to remain in low-power sleep-mode between updates, optimizes the balance between accuracy and time.
Solution Approach 2:
The patent applies preliminary action by performing the reset period and stabilization period before the actual data writing period. During the reset period, the display is initialized to a known state, and during the stabilization period, the electrophoretic particles are allowed to settle into their final positions. This preliminary preparation ensures that when data writing occurs, the display is ready to accurately reflect the new data, thereby maintaining high display accuracy. The preliminary actions are performed efficiently in sequence, minimizing the overall update time while ensuring thorough initialization.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Prevents TFT characteristic degradation, reduces power consumption, and effectively discharges static electricity by managing voltages and impedance states in the electrophoretic display device.
Implementation Method 1
If a material having electric charge is placed in DC electric field, the material peculiarly moves in accordance with electric charges, the size and shape of molecules and the like. Such a movement, i.e., a phenomenon in which materials are separated by the difference of movement, is named 'Electrophoresis'.
Data Source
AI summary
An electrophoretic display device sequentially driven during a data updating period when a data is updated and a sleep-mode period when a data is maintained includes an electrophoretic display panel including a plurality of data lines crossing a plurality of gate lines to form a plurality of cells, a plurality of pixel electrodes, a common electrode for driving each of the plurality of cells, and a TFT at a crossing of one of the data lines and one of the gate lines to supply a data voltage from the one of the data lines to a corresponding one of the pixel electrodes; a data driving circuit supplying the data voltage to the data lines during the data updating period; a gate driving circuit supplying a scanning pulse to the gate lines during the data updating period; and a controller sequentially raising an impedance of each of the data lines, the common electrode, and the gate lines during the sleep-mode period.