Electroplating Cup Lip Seal for Wafer Edge Thickness Uniformity
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current electroplating systems face challenges in achieving uniform plating thickness due to the 'terminal effect,' which results in thicker plating at the wafer edge compared to the center, and existing RDL technology struggles with CD loss, line roughness, and undercut during seed etch processes.
Innovation Solution
The proposed solution involves a thin-seed plating process that incorporates an optimized CIRP (Channeled Ionic Resistive Plate) and anode shield, coupled with a new cup+lipseal design, which intentionally exposes a portion of the seed layer at the wafer perimeter to plate a sacrificial annular ring of copper. This sacrificial ring compensates for the terminal effect by thieving current from features in close proximity, reducing plated thickness and achieving uniformity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If open contact plating systems are used, then electrical contacts can deliver current to the seed layer, but the electrodes are plated to the substrate surface and removal exposes unplated regions causing damage to the copper layer
Solution Approach 1:
The patent extracts the harmful effect by removing the electrical contacts from the plating solution environment. Closed contact systems isolate the contacts within a non-plating solution chamber, preventing copper deposition on the contacts and eliminating the need for contact removal that damages the copper layer.
Solution Approach 2:
The patent introduces an intermediary mechanism (closed contact structure with separate solution chambers) that allows electrical current delivery without direct exposure to the plating solution, thereby preventing unwanted copper deposition on the contacts.
2Power
If electrodes are exposed to plating solution during plating, then current delivery is effective, but 2 mm or more of the outer perimeter of the wafer becomes unsuitable for integrated circuit fabrication
Solution Approach 1:
The patent extracts the electrical contacts from the plating solution chamber, placing them in a separate enclosed space. This eliminates the need to exclude the wafer perimeter from plating, maximizing the usable wafer surface area while maintaining effective current delivery through the closed contact structure.
3Manufacturing precision
If nominal seed thickness (1000 A-3000 A) is used, then seed layer provides adequate coverage, but the thickness is vulnerable to CD loss, line roughness, and undercut during the long, aggressive seed etch process
Solution Approach 1:
The patent changes the seed layer thickness parameter to ultra-thin dimensions (50-500 Angstroms), which reduces the etch time and aggressiveness required. This parameter change makes the seed layer less vulnerable to CD loss, line roughness, and undercut while still providing adequate coverage for the plating process.
4Loss of time
If attempts are made to enable thin-seed plating to less than 1000 A, then etch time is reduced, but anode tuning results in global correction and wavy, non-uniform current profiles
Solution Approach 1:
The patent applies local quality by using a conformal thin-film isolation layer selectively at the wafer perimeter and in trench regions. This localized structure provides current redistribution specifically where terminal effects occur, achieving local correction without the wavy profiles caused by global anode tuning adjustments.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively corrects the terminal effect, achieving more uniform plating thickness across the wafer surface and reducing CD loss and line roughness associated with traditional seed etch processes.
Implementation Method 1
electroplating is used to deposit a thicker copper layer over the seed layer
Implementation Method 2
electroplating system that deposits a copper layer on a wafer
Data Source
AI summary
An electroplating cup assembly comprises a cup bottom, a lip seal, and an electrical contact structure. The cup bottom at least partially defines an opening configured to allow exposure of a wafer positioned in the cup assembly to an electroplating solution. The lip seal is on the cup bottom and comprises a sealing structure extending upwardly along an inner edge of the lip seal to a peak that is configured to be in contact with a seed layer of a wafer and adjacent to a sacrificial layer of the wafer. The electrical contact structure is over a portion of the seal. The electrical contact structure configured to be coupled to the seed layer of the wafer.