Element Chip Dicing With Laser Groove and Plasma Etching
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Solution Overview
Problem
Conventional manufacturing methods for element chips result in surfaces with minute projections due to residual deposits, which hinder hybrid bonding by requiring highly flat surfaces.
Innovation Solution
A manufacturing method involving substrate preparation, flattening, protective layer formation, laser grooving, deposit removal, and plasma dicing, where the deposit removal process uses plasma treatment to expose the boundary, preventing the formation of minute projections and ensuring a flat surface for hybrid bonding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional plasma dicing is used to divide substrates into element chips, then element chips can be manufactured, but minute projections form on the surfaces due to residual deposits, preventing hybrid bonding
Solution Approach 1:
The patent applies preliminary action by performing laser irradiation before plasma dicing to remove the insulator layer and form a groove. This preliminary removal of material prevents residual deposits from forming minute projections during subsequent plasma etching, thereby ensuring surface flatness required for hybrid bonding while maintaining manufacturing efficiency
Solution Approach 2:
The patent extracts the harmful residual deposits by using laser irradiation to completely remove the insulator layer in the division region before plasma dicing. By taking out the material that would otherwise remain as deposits, the method eliminates the source of minute projections and achieves the required surface flatness for hybrid bonding applications
2Ease of manufacture
If the insulator layer is not removed before plasma dicing, then the manufacturing process is simpler, but residual deposits remain and form minute projections on the element chip surfaces
Solution Approach 1:
The patent merges the insulator layer removal and groove formation into a single laser irradiation step performed before plasma dicing. By combining these functions into one preliminary process, the method maintains ease of manufacture while eliminating residual deposits that would otherwise compromise surface flatness, thus resolving the contradiction between process simplicity and manufacturing precision
3Reliability
If hybrid bonding is attempted on surfaces with minute projections, then bonding can proceed, but bonding efficiency is reduced and reliability is compromised
Solution Approach 1:
The patent performs preliminary laser irradiation to remove the insulator layer and form a clean groove surface before plasma dicing. This preliminary action ensures that no residual deposits remain to form minute projections, thereby guaranteeing both high bonding reliability and optimal bonding efficiency when hybrid bonding is subsequently performed on the element chip surfaces
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively produces element chips with surfaces that are flat enough for hybrid bonding, reducing the formation of minute projections and enhancing bonding efficiency.
Implementation Method 1
irradiating the division region with laser light from the first principal surface side and removing the protective layer and the second layer in the division region to form a groove
Implementation Method 2
etching the first layer by exposing the groove to plasma in a state where the second principal surface is supported by a support member
Implementation Method 3
flattening an upper surface of the second layer by polishing the first principal surface side of the substrate
Data Source
AI summary
The method includes a process of preparing a substrate 1 that includes a first layer 2 and a second layer 3 and includes a division region, a process of flattening an upper surface of the layer 3, a process of forming a protective layer 4 on the flattened upper surface to form a boundary 6 between the layer 3 and the layer 4, a process of removing the layers 3, 4 in the division region using laser light to form a groove 5 reaching the layer 2, and depositing, on side walls of the groove 5, a deposit D so as to cover the boundary 6, a process of removing the deposit D to expose the boundary 6 on the side walls, and a process of etching the layer 2 by exposing the groove 5 to plasma, and thereby dividing the substrate 1 into a plurality of element chips.