Element Substrate Memory Switching for Fast Anti-Fuse Writing
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Solution Overview
Problem
Existing anti-fuse memories face operation errors due to high-frequency latch signals used for writing, potentially causing incorrect data retention, and adding a dedicated write signal terminal increases substrate size.
Innovation Solution
A control data supply unit synchronizes clock and data signals to generate selection and switching signals, using a switch to connect memory control signals with data terminals, allowing pulse-driven writing without additional terminals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a dedicated write signal terminal is added to input high-frequency latch signals for memory writing, then writing speed is improved, but substrate size increases
Solution Approach 1:
The data signal terminal is designed to serve dual purposes: it inputs data signals during normal operation and serves as the write signal input terminal during memory writing operations. This multi-functionality eliminates the need for a dedicated write signal terminal, maintaining writing speed while preventing substrate size increase
Solution Approach 2:
The invention merges the data signal input function and the write signal input function into a single terminal. By combining these functions, the patent avoids adding extra terminals while still enabling high-frequency write operations through the same terminal that inputs data signals
2Speed
If high-frequency latch signals are used for memory writing, then writing speed is improved, but circuit operation errors occur
Solution Approach 1:
The patent dynamically adjusts the signal frequency based on the operation mode. During memory writing operations, the latch signal frequency is increased to enable fast writing, while during normal data input operations, the signal frequency remains at standard levels, ensuring circuit stability and preventing operation errors
Solution Approach 2:
The invention implements periodic control of the latch signal frequency, switching between high-frequency mode during write operations and low-frequency mode during normal operations. This periodic adjustment ensures that high-frequency signals are only applied when needed for writing, maintaining reliability while enabling fast writing when required
Data Source
AI summary
A switch is configured to switch connection between a second terminal to which a data signal is input and a memory control signal of a memory element in accordance with a switching signal included in a data signal. In write to a memory element, the switching signal switches such that the switch connects the second terminal and the memory control signal of the memory element, and a pulse signal for the write to the memory element is input via the second terminal.