Element Substrate Mask Circuit Reduces Print Data

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Solution Overview

Problem

Existing printing technologies require increased signal data for selecting print elements, leading to slower print speeds due to the need to determine between print and anti-fuse element selection modes, which increases data transmission and processing time.

Innovation Solution

An element substrate configuration that includes shift registers, latch circuits, decoder circuits, and mask circuits to reduce the data required for selecting print elements, utilizing a control data supply circuit to output selection signals efficiently, thereby minimizing the data needed for print element selection during printing operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If a selection circuit is shared for both print element and anti-fuse element selection, then the space on the semiconductor substrate is reduced, but the amount of data required for element selection increases

Engineering Contradiction:
Improvesemiconductor substrate areaVSAvoiddata amount for element selection
Core Design Contradiction:
Area of stationary objectVSQuantity of substance

Solution Approach 1:

The mask circuit pre-processes the selection signal by masking the anti-fuse element selection path during printing operations. This preliminary action ensures that only print element selection data is transmitted, reducing the data amount without requiring separate selection circuits

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The mask circuit dynamically changes its behavior based on the operation mode (printing vs. anti-fuse selection). During printing, it masks anti-fuse selection signals; during anti-fuse operations, it allows those signals through. This dynamic switching maintains space efficiency while managing data transmission requirements

Inventive Principle:
Principle #15Dynamics

2Adaptability or versatility

If element selection data amount increases, then more elements can be selected, but the print speed decreases due to increased data transmission and processing time

Engineering Contradiction:
Improveelement selection capabilityVSAvoidprint speed
Core Design Contradiction:
Adaptability or versatilityVSSpeed

Solution Approach 1:

The mask circuit extracts and removes the anti-fuse element selection data from the transmission path during printing operations. By taking out this unnecessary data, the system maintains full element selection capability when needed while eliminating data transmission overhead during printing, thus preserving print speed

Inventive Principle:
Principle #2Taking out (Extraction)

3Device complexity

If a single selection circuit is used for both print and memory elements, then device complexity is reduced, but the data processing time increases

Engineering Contradiction:
Improveselection circuit complexityVSAvoiddata processing time
Core Design Contradiction:
Device complexityVSLoss of time

Solution Approach 1:

The mask circuit acts as an intermediary between the shared selection circuit and the element arrays. It mediates the selection signals by selectively blocking anti-fuse selection paths during printing, thereby reducing data processing time without requiring separate selection circuits for different element types

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11981129B2Element substrate, liquid discharge head, and printing apparatus
Publication Date: 2024.05.14 CANON KK
  • US11981129B2 patent drawing
  • US11981129B2 patent drawing
  • US11981129B2 patent drawing

AI summary

An element substrate comprises a plurality of stages of shift registers that inputs and holds a serial data signal; a latch circuit that latches the serial data held by the shift registers; a decoder circuit that inputs an output of the latch circuit and outputs a selection signal for selecting a block of the print elements or the memory elements; and a mask circuit that masks the output of the selection signal for selecting the block of the memory elements from the decoder circuit in accordance with an input bit data signal. The block of the print elements or the memory elements includes a plurality of print elements or memory elements in which one element is selected in each of the plurality of groups.