Elemental Chip Resist Patterning via Low-Temperature Solvent Control
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Solution Overview
Problem
The handling of thin substrates in chip manufacturing is complicated by electrostatic-stick carriers, which are costly for mass production, and holding tapes with low heat-resistant temperatures degrade when baked, affecting resist patterning accuracy.
Innovation Solution
A manufacturing process involving a substrate held on a holding tape with a resist solution sprayed to form droplets, where the solvent is vaporized to reduce the solvent content in the resist layer to 5-20 wt.%, allowing patterning without baking and plasma-etching at low temperatures, maintaining the tape and substrate below 50°C.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the coating layer is baked at a temperature high enough to form the resist patterning, then the resist patterning accuracy is improved, but the adhering or holding tape deteriorates due to low heat-resistant temperature
Solution Approach 1:
The invention changes the temperature parameter from high-temperature baking (90°C or higher) to low-temperature processing (below 50°C). This is achieved by using a holding tape with high heat-resistant temperature and controlling the solvent content in the resist layer to 5-20 wt.%, allowing resist patterning without degrading the tape
Solution Approach 2:
The invention uses a holding tape as a carrier copy that can be reused multiple times. The tape maintains its functional properties after low-temperature processing, allowing the substrate to be held and processed repeatedly without tape deterioration, unlike single-use electrostatic-stick carriers
2Reliability
If the coating layer is baked at a lower temperature to preserve the holding tape, then the holding tape integrity is maintained, but the solvent remains in the coating layer exceeding the permissible range which degrades resist patterning accuracy
Solution Approach 1:
The invention eliminates the discontinuous high-temperature baking step by implementing continuous low-temperature processing. The resist solution is applied and processed continuously at temperatures below 50°C, maintaining both tape integrity and achieving sufficient solvent removal through controlled evaporation during the application process
Solution Approach 2:
The invention changes the temperature parameter from high-temperature baking (90°C or higher) to low-temperature processing (below 50°C). This is achieved by using a holding tape with high heat-resistant temperature and controlling the solvent content in the resist layer to 5-20 wt.%, allowing resist patterning without degrading the tape
3Ease of operation
If an electrostatic-stick carrier is used to hold the substrate, then the substrate handling is improved, but the process complexity increases and substantial cost is required for mass production
Solution Approach 1:
The invention replaces expensive electrostatic-stick carriers with a simple, reusable holding tape. The tape is a low-cost alternative that can be used repeatedly in mass production, eliminating the need for complex electrostatic charging mechanisms while maintaining substrate holding functionality
Solution Approach 2:
The holding tape serves multiple functions: it holds the substrate during resist application, withstands the processing temperature, and can be reused across multiple production cycles. This multi-functional simple structure replaces the specialized electrostatic-stick carrier system
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This process simplifies substrate handling, reduces solvent content in the resist layer, and maintains the tape's integrity during patterning and etching, enhancing the accuracy of resist patterning and plasma etching without the need for high-temperature baking.
Implementation Method 1
a layer-formation step for forming a resist layer by vaporizing the solvent from the droplets and depositing the resist constituent on the first side of the substrate
Implementation Method 2
an etching step for plasma-etching the substrate on the first side exposed in the segmentation regions thereof
Data Source
AI summary
A manufacturing process of an elemental chip includes steps of preparing a substrate held on the holding tape, the substrate including first and second sides opposite each other and the second side thereof being held on the holding tape, and the substrate further including a plurality of element regions and a plurality of segmentation regions defining each of the element regions; setting a nozzle to have a length between a lower most edge of the nozzle and the first side of the substrate in a range between 20 mm and 150 mm, spraying a resist solution to form droplets of the resist solution, the resist solution containing a resist constituent and a solvent; forming a resist layer by vaporizing the solvent from the droplets and depositing the resist constituent on the first side of the substrate that is held on the holding tape such that an amount of the solvent remained in the resist layer to be in a range between 5 wt. % and 20 wt. %; patterning the resist layer to expose the first side of the substrate in the segmentation regions; and plasma-etching the first side of the substrate exposed in the segmentation regions thereof.