Elevated Inductor Power Module Layout for Denser Decoupling

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Solution Overview

Problem

The limited space under ICs for vertical power delivery modules restricts the number of decoupling capacitors, leading to inferior transient performance and increased IR loss in conventional power delivery solutions.

Innovation Solution

Elevating inductors above the surface of the power module allows for capacitors to be arranged underneath, increasing the number of capacitors and reducing IR loss, thereby enhancing transient performance and power delivery efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If decoupling capacitors are placed on the same side of the PCB as the IC, then the area under the IC is saved, but the transient performance of the power rail suffers from reduced capacitance

Engineering Contradiction:
Improvearea under ICVSAvoidtransient performance
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent moves decoupling capacitors from the traditional planar arrangement on the PCB surface to a three-dimensional configuration by placing them underneath elevated inductors. This vertical stacking approach utilizes the Z-dimension (height) to accommodate additional capacitance without increasing the footprint area, thereby resolving the contradiction between limited area and required transient performance.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If more decoupling capacitors are included on the power module, then transient performance improves, but the surface area of the power module increases

Engineering Contradiction:
Improvetransient performanceVSAvoidsurface area of power module
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent implements a nested configuration where decoupling capacitors are positioned underneath elevated inductors, effectively nesting one component within the spatial envelope of another. This allows multiple capacitors to be accommodated within the vertical space occupied by the inductor structure, increasing total capacitance without proportionally increasing the power module's surface area.

Inventive Principle:
Principle #7Nested doll (Nesting)

3Quantity of substance

If inductors are elevated above the PCB surface, then more capacitors can be arranged underneath, but the structural complexity of the power module increases

Engineering Contradiction:
Improvenumber of capacitorsVSAvoidstructural complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent employs segmentation by dividing the inductor structure into discrete mounting posts that elevate the inductor body above the PCB surface. This segmentation allows the inductor to be supported at specific points rather than requiring a continuous complex structure, simplifying the overall design while creating the necessary vertical space for capacitor placement underneath.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12603210B2Power modules with elevated inductors and capacitors arranged under the inductors
Publication Date: 2026.04.14 GOOGLE LLC
  • US12603210B2 patent drawing
  • US12603210B2 patent drawing
  • US12603210B2 patent drawing

AI summary

The disclosure relates to power modules that include elevated inductors with capacitors disposed under the inductors. In one aspect, a power module includes a first circuit board having a first surface and a second surface opposite the first surface. One or more inductors are mounted on the first surface. Each of the one or more inductors includes a top surface and a bottom surface opposite the top surface and that faces the first surface of the first circuit board. Each inductor is elevated above the first surface of the first circuit board such that at least a portion of the bottom surface of the inductor does not contact the first surface of the first circuit board. The first circuit board includes capacitors arranged in an area below the portion of the bottom surface of the inductor that does not contact the first surface of the first circuit board.