Elevated Photodiode Stacked Architecture for BSI Sensors
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As image sensors, particularly Back Side Illumination (BSI) sensors, scale down to sub-micrometer pixel pitches, maintaining Signal to Noise Ratio (SNR), Quantum Efficiency (QE), and sensitivity becomes challenging due to limited photodiode area, and conventional photodiode structures face difficulties in performance optimization.
Innovation Solution
The development of elevated photodiodes with a stacked scheme, where an image sensor wafer with an elevated photoelectrical conversion layer is face-to-face or face-to-back bonded with a device wafer, incorporating isolation structures and flexible process tuning to enhance cross-talk isolation and fill factor, allowing for improved electrical connectivity and signal processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If pixel pitch is scaled down to sub micrometer range to reduce cost and increase packing density, then packing density is improved, but photodiode area is limited and performance such as SNR, QE, and sensitivity deteriorates
Solution Approach 1:
The patent applies dimensionality change by elevating the photodiode structure from a planar configuration to a three-dimensional stacked architecture. The photodiode is positioned above the substrate surface using sacrificial layers and spacer structures, creating vertical separation between the photodiode active area and underlying circuitry. This vertical dimension allows the photodiode to maintain a larger effective light-receiving area even when pixel pitch is reduced, thereby preserving SNR and QE performance while achieving higher packing density through compact lateral footprint.
2Productivity
If photodiode area is reduced to accommodate smaller pixel pitch, then packing density is improved, but quantum efficiency and sensitivity deteriorate
Solution Approach 1:
By transitioning to a three-dimensional elevated structure, the photodiode achieves increased vertical height above the substrate plane. This additional dimension provides greater volume for the photodiode active region without increasing lateral footprint, allowing quantum efficiency to be maintained or improved while accommodating smaller pixel pitches and achieving higher packing density.
3Ease of manufacture
If conventional photodiode structures are used with scaled down features, then manufacturing complexity is reduced, but performance optimization becomes difficult
Solution Approach 1:
The patent segments the image sensor into separate functional layers: the photodiode layer elevated above the substrate, the substrate containing support circuitry, and intermediate spacer/sacrificial layers. This segmentation allows independent optimization of each layer's properties and processes. The photodiode can be fabricated with specific dimensions and doping profiles optimized for performance, while the substrate can be processed separately to provide mechanical support and electrical connections, achieving both performance optimization and manufacturing feasibility.
Solution Approach 2:
The patent introduces intermediary structures including sacrificial layers (e.g., oxide layers) and spacer structures that facilitate the formation of the elevated photodiode. These intermediary elements enable precise control over photodiode positioning and spacing from the substrate, allowing performance optimization through controlled geometry while maintaining compatibility with standard semiconductor fabrication processes.
4Reliability
If elevated photodiode structure is implemented, then fill factor and cross-talk isolation are improved, but process complexity increases
Solution Approach 1:
By elevating the photodiode structure vertically above the substrate plane using spacer and sacrificial layers, the patent creates physical separation between adjacent photodiodes and between the photodiode and substrate circuitry. This vertical dimension provides inherent electrical isolation that reduces cross-talk without requiring complex lateral isolation structures, achieving improved cross-talk isolation while maintaining relatively simple planar process steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables high fill factor image sensors with improved immunity to electrical crosstalk and optimized process conditions for both image sensor and device wafers, maximizing photodiode performance and maintaining sensitivity even at smaller feature sizes.
Implementation Method 1
an image sensor wafer with an elevated photoelectrical conversion layer
Data Source
AI summary
A device includes an image sensor chip having formed therein an elevated photodiode, and a device chip underlying and bonded to the image sensor chip. The device chip has a read out circuit electrically connected to the elevated photodiode.