Elliptical Contact Plugs in Semiconductor Memory Devices
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Solution Overview
Problem
The miniaturization of semiconductor memory devices, such as NAND flash memories, leads to challenges in reducing the size of bit line contacts and the space between them, causing potential shorts, decreased breakdown voltage, and increased contact resistance, which existing staggered contact arrangements struggle to address effectively.
Innovation Solution
A semiconductor memory device with a contact region arrangement featuring alternating three-contact and two-contact oblique staggered arrangements, where contact plugs are elliptically shaped with tilted major axes, optimizing the rotation angles and dimensions to prevent shorts and maintain breakdown voltage while reducing chip area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the size of bit line contacts and the space between contacts are reduced to achieve miniaturization, then memory capacity increases, but contact shorts and decreased breakdown voltage occur
Solution Approach 1:
The patent transitions from a conventional linear contact arrangement to a two-dimensional staggered grid pattern. Contacts are arranged in alternating rows with different spacing, creating a multi-dimensional layout that increases the effective distance between adjacent contacts while maintaining compact overall footprint. This dimensional change allows smaller contact sizes without proportional reduction in breakdown voltage.
Solution Approach 2:
The contact array is segmented into multiple rows with different contact pitch values. First rows have a first pitch while second rows have a second pitch, creating heterogeneous spacing patterns. This segmentation allows different regions to have optimized spacing for their specific functions, preventing uniform shorting across the entire array while maintaining high density.
2Area of stationary object
If the size of bit line contacts is reduced, then chip area decreases, but contact resistance increases
Solution Approach 1:
The patent applies different contact pitch values to different rows of contacts. First rows use a first pitch optimized for one set of conditions while second rows use a second pitch optimized for different conditions. This local differentiation allows each row to have tailored characteristics that optimize both area utilization and electrical performance for its specific position and function.
3Ease of manufacture
If a simple two-contact staggered arrangement is used, then manufacturing is simplified, but it cannot suppress contact shorts and breakdown voltage decrease due to miniaturization
Solution Approach 1:
The contact arrangement is divided into multiple row types with different pitch characteristics. First rows contain contacts with a first pitch while second rows contain contacts with a second pitch. This segmentation creates a more complex but effective pattern that can suppress shorts better than uniform arrangements while remaining manufacturable through standard lithography processes.
Data Source
AI summary
In one embodiment, a semiconductor memory device includes a substrate, and device regions in the substrate to extend in a first direction. The device further includes select gates on the substrate to extend in a second direction, and a contact region provided between the select gates and including contact plugs on the respective device regions. The contact region includes partial regions, in each of which N contact plugs are disposed on N successive device regions to be arranged on a straight line being non-parallel to the first and second directions, where N is an integer of 2 or more. The contact region includes the partial regions of at least two types whose values of N are different. Further, each of the contact plugs has a planar shape of an ellipse, and is arranged so that a major axis of the ellipse is tilted with respect to the first direction.