Elliptical MOS Transistor Floating Diffusion Layers
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Solution Overview
Problem
Conventional semiconductor devices, such as N channel type MOS transistors, face challenges in achieving desired withstand voltage and current characteristics due to the convergence of electric fields in inactive regions and increased on-state resistance caused by P type floating field rings and field oxide films.
Innovation Solution
The semiconductor device incorporates a semiconductor layer with active and inactive regions, featuring a P type diffusion layer formed in both regions, with specific impurity concentrations and diffusion depths, and LOCOS oxide films only in inactive regions to improve withstand voltage characteristics and prevent current detours.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If P type floating field rings are used to improve withstand voltage characteristics in round regions, then withstand voltage is improved, but on-state resistance increases due to barriers against free carrier flow
Solution Approach 1:
The patent applies different structures to different regions: P type diffusion layers are formed only in round regions (inactive regions) and not in linear regions (active regions). This local differentiation allows the round regions to have improved withstand voltage characteristics while the linear regions maintain low on-state resistance, as they lack the barrier-forming P type structures.
Solution Approach 2:
The patent segments the device into distinct active (linear) and inactive (round) regions with different structural characteristics. The P type diffusion layers are selectively placed only in the round regions, creating spatially segmented functionality where each region is optimized for its specific purpose without interfering with the other.
2Reliability
If field oxide film is formed between drain and source regions to improve withstand voltage, then withstand voltage is improved, but on-state resistance increases due to barriers against free carrier flow
Solution Approach 1:
The patent eliminates field oxide films from the linear regions (active regions) while they may still be present in round regions. This local quality differentiation ensures that the linear regions, which carry current, do not have resistance-increasing barriers, while the round regions still benefit from the field oxide film for withstand voltage improvement.
3Ease of manufacture
If inactive regions have the same structure as linear regions, then manufacturing is simplified, but electric field convergence occurs in round regions leading to poor withstand voltage characteristics
Solution Approach 1:
The patent introduces local structural differentiation by forming P type diffusion layers specifically in the round inactive regions. This creates local quality variation that addresses the electric field convergence problem in round regions without significantly complicating the overall manufacturing process, as the additional step is region-specific rather than requiring complete structural redesign.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances withstand voltage and reduces on-state resistance by preventing electric field convergence and maintaining low resistance values, thereby improving the overall performance of the MOS transistor.
Implementation Method 1
a metal layer disposed on the insulating film so as to form capacitive coupling with the first and second diffusion layers
Data Source
AI summary
In a semiconductor device of the present invention, a MOS transistor is disposed in an elliptical shape. Linear regions in the elliptical shape are respectively used as the active regions, and round regions in the elliptical shape is used respectively as the inactive regions. In each of the inactive regions, a P type diffusion layer is formed to coincide with a round shape. Another P type diffusion layer is formed in a part of one of the inactive regions. These P type diffusion layers are formed as floating diffusion layers, are capacitively coupled to a metal layer on an insulating layer, and assume a state where predetermined potentials are respectively applied thereto. This structure makes it possible to maintain current performance of the active regions, while improving the withstand voltage characteristics in the inactive regions.