Elliptical TSVs Reduce Stress and Area in Silicon Interposers
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Solution Overview
Problem
In integrated circuits (ICs), manufacturing flaws in larger dies lead to operational failures, and using multiple dies with circular through silicon vias (TSVs) results in significant unused silicon area and increased stress effects on active devices due to the circular shape's stress concentration patterns.
Innovation Solution
Implementing elliptical shaped TSVs within a silicon interposer reduces stress effects along the minor axis, narrows the keep-out zone (KOZ) for active devices, and allows for closer placement of active devices by aligning them parallel to the major axis of the TSVs, thereby increasing the usable area within the interposer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If circular TSVs are used in multi-die ICs, then vertical conductive paths are established, but stress concentration occurs and significant unused silicon area is created
Solution Approach 1:
The patent applies asymmetry by changing the TSV shape from circular to elliptical. This asymmetric geometry strategically positions the longer dimension of the ellipse perpendicular to stress propagation paths, reducing stress concentration effects while narrowing the keep-out zone and increasing usable silicon area for active devices.
Solution Approach 2:
The patent modifies the circular geometry of traditional TSVs by introducing an elliptical shape with controlled curvature ratios. This curvature modification optimizes stress distribution patterns and allows active devices to be placed closer to the TSVs, thereby increasing the usable area while maintaining structural integrity.
2Reliability
If circular TSVs are used, then through-conduction is achieved, but stress effects concentrate on active devices
Solution Approach 1:
The elliptical shape introduces asymmetry that strategically directs stress distribution away from active devices. By orienting the major axis of the ellipse perpendicular to the primary stress propagation direction, the design reduces stress concentration on surrounding active devices while maintaining effective vertical conduction.
Solution Approach 2:
The patent applies local quality by creating different geometric properties at different orientations of the TSV. The elliptical cross-section provides different dimensional characteristics along its major and minor axes, with the minor axis dimension specifically optimized to minimize stress effects on nearby active devices while the major axis maintains adequate conduction capability.
3Area of stationary object
If elliptical TSVs are implemented, then KOZ is narrowed and usable area increases, but manufacturing complexity may increase
Solution Approach 1:
The patent implements parameter changes by defining specific elliptical geometry parameters including aspect ratio, orientation, and dimensional relationships. These controlled parameter variations enable the elliptical shape to be manufactured using standard semiconductor fabrication processes while achieving the desired stress reduction and area optimization benefits.
Data Source
AI summary
An integrated circuit structure can include a silicon interposer. The silicon interposer can include a first elliptical TSV and a keep out zone (KOZ) for stress effects upon active devices surrounding the first elliptical TSV. A size of the KOZ can be determined by a transverse diameter and a conjugate diameter of the first elliptical TSV.