Elongated Flip-Chip Bumps for Stable Land Self-Alignment

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Solution Overview

Problem

In flip-chip bonding, the self-alignment effect between bumps and lands is degraded when the land area is larger than the bump area, leading to potential faulty positioning of semiconductor chips on mounting substrates.

Innovation Solution

A semiconductor device design where the difference between the land dimension and the distance between the outer edges of connected bumps is 20 μm or less, ensuring precise alignment through the self-alignment effect at the edges of the land and bump, with some bumps offset to enhance positioning stability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the land area is made larger than the bump area, then the connectivity between bump and land is improved, but the self-alignment effect is degraded leading to faulty positioning

Engineering Contradiction:
Improveconnectivity between bump and landVSAvoidpositioning accuracy
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent changes the geometric parameters of the bump structure by introducing an elongated shape with specific aspect ratio (2:1 or greater) and controlled dimensions. The bump length is set to 1.5-3 times the land pitch, and the width is controlled to maintain aspect ratio within 0.5-2.0. This parameter optimization allows the land area to be larger than the bump area for improved connectivity while the elongated shape provides enhanced edge alignment features that maintain self-alignment effect and positioning accuracy.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If the land area is larger than the bump area, then solder connectivity is improved, but the position of lands with respect to bumps varies

Engineering Contradiction:
Improvesolder connectivityVSAvoidposition variability
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The patent introduces asymmetric elongation of the bump structure in the direction parallel to the land pitch. The bump is elongated along the length direction (parallel to land pitch) rather than being circular or symmetric. This asymmetric elongation creates distinct edge features that enhance the self-alignment effect during soldering, providing better positional reference while allowing the land area to exceed the bump area for improved solder connectivity.

Inventive Principle:
Principle #4Asymmetry

3Area of moving object

If elongated bumps are used, then the area of bump is increased, but the solder height becomes higher which may cause connection failure

Engineering Contradiction:
Improvebump areaVSAvoidconnection reliability
Core Design Contradiction:
Area of moving objectVSReliability

Solution Approach 1:

The patent optimizes the dimensional parameters of the elongated bump to balance area increase with solder height control. The bump length is controlled to be 1.5-3 times the land pitch, and the width is adjusted to maintain aspect ratio within 0.5-2.0. This controlled elongation increases the bump area for better connectivity while the aspect ratio constraints prevent excessive solder height that would cause connection failure.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design effectively suppresses faulty positioning and stabilizes the mounting position of semiconductor chips, reducing variability in impedance and heat dissipation, while allowing for smaller land areas and efficient heat dissipation paths.

Implementation Method 1

due to the self-alignment effect provided by the surface tension of solder, the relative position between a bump and a land is substantially self-alignedly determined

Methodology Applied
Scientific EffectSurface tension: Surface Tension

Data Source

PatentUS12154847B2Semiconductor device including semiconductor chip having elongated bumps
Publication Date: 2024.11.26 MURATA MFG CO LTD
  • US12154847B2 patent drawing
  • US12154847B2 patent drawing
  • US12154847B2 patent drawing

AI summary

A semiconductor chip is mounted on a mounting substrate. The semiconductor chip includes plural first bumps on a surface facing the mounting substrate. The plural first bumps each have a shape elongated in a first direction in plan view and are arranged in a second direction perpendicular to the first direction. The mounting substrate includes, on a surface on which the semiconductor chip is mounted, at least one first land connected to the plural first bumps. At least two first bumps of the plural first bumps are connected to each first land. The difference between the dimension of the first land in the second direction and the distance between the outer edges of two first bumps at respective ends of the arranged first bumps connected to the first land is 20 μm or less.