Elongated Via Pad Layout for Passivation Crack Relief
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Solution Overview
Problem
The ever-decreasing geometry size of semiconductor ICs leads to physical stress issues due to temperature changes, causing problems such as peeling or cracking in conventional metal pads and passivation layers.
Innovation Solution
A novel semiconductor structure is introduced, featuring well-designed vias that provide support for metal pads, with specific dimensions and configurations to reduce passivation cracking, including elongated vias aligned symmetrically under the pads, and a ratio of via width to pad width that minimizes stress-induced cracking.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If geometry size of semiconductor ICs is decreased to increase functional density, then functional density is improved, but physical stress due to temperature change increases causing peeling or cracking in metal pads and passivation layers
Solution Approach 1:
The invention divides the metal pad structure into multiple segments by introducing via holes that penetrate through the pad. These via holes create a segmented structure where the pad is divided into multiple regions separated by the via openings, allowing each segment to independently accommodate thermal expansion and contraction, thereby reducing stress concentration and preventing cracking while maintaining high functional density
Solution Approach 2:
The invention applies different structural characteristics to different regions of the metal pad. The areas around the via holes have localized stress relief features, while the overall pad maintains its conductive function. This local modification of structure (adding via holes at specific locations) provides stress management exactly where needed without compromising the overall pad performance or requiring complete redesign of the entire device
2Reliability
If geometry size of semiconductor ICs is decreased to increase functional density, then functional density is improved, but peeling or cracking in passivation layers occurs due to increased physical stress
Solution Approach 1:
The via holes penetrating through the metal pad create segmentation that extends to the passivation layer structure. This segmentation allows the passivation layer to flex and accommodate thermal stress without developing continuous cracks, as the via holes act as stress interruption points that prevent crack propagation through the passivation layer
Solution Approach 2:
The via holes are pre-formed through the metal pad structure before final device operation. This beforehand structural preparation creates stress relief pathways that cushion against future thermal cycling stresses, preventing the initiation and propagation of cracks in the passivation layer before they can cause device failure
3Strength
If via holes are introduced to reduce stress, then stress-induced cracking is reduced, but device structure complexity increases
Solution Approach 1:
The via holes serve multiple functions simultaneously: they provide stress relief by segmenting the pad structure, they maintain electrical connectivity between different metal layers, and they facilitate thermal management. This multi-functionality means that the same structural feature that reduces cracking also supports other critical device functions, thereby minimizing the net increase in complexity while achieving stress management
Data Source
AI summary
A semiconductor device and method of manufacturing the same are provided. The semiconductor device includes an interconnect structure on a substrate; a passivation layer disposed on the interconnect structure; a first via, a second via and a third via disposed in the passivation layer and connected to the interconnect structure, each of the first, second and third vias has an elongated shape longitudinally oriented along a first direction; and a first pad longitudinally oriented along the first direction and landing on the first, second and third vias.