EM Sign-Off Thermal Modeling for Self-Heating FinFET Layouts
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Solution Overview
Problem
Current electromigration (EM) evaluation methodologies in semiconductor devices do not adequately account for self-heating effects (SHE), leading to underestimated conductive line operating temperatures and increased risks of premature failures due to accelerated EM-related failures in FinFET integrated circuit designs.
Innovation Solution
A self-heating aware EM evaluation methodology that uses equation-based device temperature calculations and pseudo-3D thermal models to adjust conductive line temperatures, considering FinFET, high-resistance, and conductive line self-heating effects, to improve the accuracy of EM evaluations and reduce the risk of premature failures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional EM evaluation methodologies are used, then the evaluation process is simple, but the temperature calculation is inaccurate leading to underestimated operating temperatures
Solution Approach 1:
The patent segments the thermal analysis into distinct components: self-heating effects in FinFET devices, self-heating in high-resistance structures, and self-heating in conductive lines. Each segment is calculated separately using specific equations, and the results are combined to determine the total temperature rise. This segmentation allows for accurate temperature calculation while maintaining a structured, manageable evaluation process.
Solution Approach 2:
The patent performs preliminary thermal calculations by determining temperature rises from various heat sources before conducting the EM evaluation. The methodology calculates ΔT values for FinFET devices, high-resistance structures, and conductive lines in advance, then uses these pre-calculated temperature values as inputs for the EM assessment. This preliminary action ensures accurate temperature data is available when performing the EM evaluation.
2Reliability
If self-heating effects are not considered, then the evaluation methodology is simpler, but the risk of premature failure increases due to accelerated EM
Solution Approach 1:
The patent incorporates feedback by using the calculated temperature rise values to adjust and refine the EM evaluation. The methodology calculates temperature increases from self-heating effects, then feeds this thermal information back into the EM assessment process to determine the actual EM risk at the elevated temperatures. This feedback loop ensures that the reliability assessment reflects real operating conditions rather than idealized low-temperature scenarios.
Solution Approach 2:
The patent changes the temperature parameter from nominal operating temperature to actual operating temperature by adding calculated temperature rises from self-heating effects. This parameter change transforms the EM evaluation from a conservative estimate based on low temperatures to a realistic assessment based on actual high-temperature operating conditions, thereby improving reliability prediction accuracy.
3Measurement precision
If detailed thermal models are used, then temperature accuracy is improved, but simulation runtime increases
Solution Approach 1:
The patent extracts and isolates the critical thermal calculation components from a full thermal simulation. Instead of performing comprehensive thermal modeling of the entire device, the methodology extracts and calculates only the relevant temperature rises from FinFET self-heating, high-resistance structure self-heating, and conductive line self-heating using simplified equations. This extraction approach provides sufficient local temperature accuracy for EM evaluation while avoiding the computational burden of complete thermal simulation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach provides more accurate local temperature calculations and thermal-aware EM evaluation results, reducing the risk of premature product failure and simulation runtime, while ensuring semiconductor devices meet performance and lifetime expectations.
Implementation Method 1
calculating a self-heating effect (SHE) temperature rise for each of the heat generating structures
Implementation Method 2
evaluating a thermal coupling between the heat generating structures and the heat sensitive structure, and calculating a temperature increase induced by the thermal coupling
Data Source
AI summary
An electromigration (EM) sign-off methodology that utilizes a system for analyzing an integrated circuit design layout to identify heat sensitive structures, self-heating effects, heat generating structures, and heat dissipating structures. The EM sign-off methodology includes a memory and a processor configured for calculating adjustments of an evaluation temperature for a heat sensitive structure by calculating the effects of self-heating within the temperature sensitive structure as well as additional heating and/or cooling as a function of thermal coupling to surrounding heat generating structures and/or heat dissipating elements located within a defined thermal coupling volume or range of the heat sensitive structures.