Embedding TSV Semiconductor Die in Substrate Cavities for Vertical Interconnect
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Solution Overview
Problem
Current semiconductor devices face challenges in achieving a cost-effective and efficient vertical electrical interconnect for semiconductor package-on-package (PoP) configurations, resulting in larger package sizes and higher manufacturing costs due to the large form factor of conductive through hole vias (THVs) and through silicon vias (TSVs).
Innovation Solution
A method is developed to embed a TSV semiconductor die within a substrate by forming cavities in a substrate, mounting the die, forming insulating and conductive layers, and creating electrically common or isolated conductive segments to facilitate a smaller, more efficient vertical interconnect, reducing package size and increasing unit density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conductive through hole vias (THVs) or through silicon vias (TSVs) are used for vertical interconnect, then electrical connection is achieved, but package size increases and unit density decreases
Solution Approach 1:
The semiconductor die is embedded within cavities formed in the substrate, with insulating material nested around the die within the cavities. This nesting approach allows the interconnect structure to be compact, reducing the overall package footprint while maintaining electrical connection functionality through the vertical vias.
Solution Approach 2:
The invention transitions from a planar interconnect layout to a three-dimensional structure by forming vias that extend vertically through the substrate and embedding die within cavities. This vertical dimensionality change enables higher unit density on the substrate by utilizing the z-direction for interconnection rather than requiring lateral space.
2Reliability
If conventional vertical interconnect methods are used, then electrical connection is established, but manufacturing cost increases
Solution Approach 1:
The substrate is segmented into multiple cavities that can accommodate individual semiconductor die. This segmentation allows for modular assembly and enables the formation of conductive segments within cavities that can be independently processed, potentially reducing manufacturing complexity and cost compared to conventional through-hole via methods.
Solution Approach 2:
Insulating material is introduced as an intermediary substance within the cavities, surrounding the semiconductor die and providing both electrical isolation and mechanical support. This intermediary approach enables cost-effective manufacturing by simplifying the interconnect structure while maintaining reliable electrical connections through the conductive vias.
3Reliability
If larger package size is used, then vertical interconnect is achieved, but unit density on substrate decreases
Solution Approach 1:
The invention changes the geometric parameters of the interconnect structure by forming cavities with specific dimensions and depths within the substrate. By controlling the cavity parameters and using conductive material to fill via holes within these cavities, the structure achieves vertical interconnect capability while maintaining a compact footprint that maximizes unit density on the substrate.
Data Source
AI summary
A semiconductor device has a substrate with a first conductive layer over a surface of the substrate and a plurality of cavities exposing the first conductive layer. A first semiconductor die having conductive TSV is mounted into the cavities of the substrate. A first insulating layer is formed over the substrate and first semiconductor die and extends into the cavities to embed the first semiconductor die within the substrate. A portion of the first insulating layer is removed to expose the conductive TSV. A second conductive layer is formed over the conductive TSV. A portion of the first conductive layer is removed to form electrically common or electrically isolated conductive segments of the first conductive layer. A second insulating layer is formed over the substrate and conductive segments of the first conductive layer. A second semiconductor die is mounted over the substrate electrically connected to the second conductive layer.