Embedded Circuit Board Layout for Switching Noise Cancellation
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Solution Overview
Problem
Conventional circuit boards with built-in components experience noise issues due to inductance and current intermittence during switching operations, which existing technologies fail to adequately address.
Innovation Solution
A circuit board design featuring a first and second conductive wiring layer with an insulating layer in between, where the first and second semiconductor elements are arranged with symmetrical and opposite current flow, and power supply terminals are positioned to cancel out magnetic flux, reducing noise without additional shielding components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional surface mounting technology is used, then ease of manufacture is improved, but circuit density increases only limitedly
Solution Approach 1:
The patent transitions from two-dimensional surface mounting to three-dimensional internal mounting by embedding semiconductor elements within the insulating layer of the circuit board. This dimensional change allows components to be positioned inside the board structure rather than only on the surface, significantly increasing circuit density while maintaining manufacturing feasibility through standardized embedding processes
2Quantity of substance
If semiconductor elements are built inside the insulating layer, then circuit density is improved, but noise from switching operations increases
Solution Approach 1:
The patent employs asymmetrical current path design where the first and second conductive wiring layers are configured with different current directions. By making the current paths asymmetrical and ensuring they do not overlap, the patent reduces magnetic flux coupling between layers, thereby suppressing noise generation from switching operations while maintaining high circuit density
Solution Approach 2:
The patent converts the potentially harmful inductance effect into a beneficial shielding mechanism. By configuring conductive wiring layers with opposite current directions, the magnetic flux generated by one layer is counteracted by the other layer, transforming the inductance that causes noise into a noise-cancelling effect
3Object-generated harmful factors
If additional shielding components are added to reduce noise, then noise reduction is improved, but device complexity increases
Solution Approach 1:
The patent makes the conductive wiring layers serve dual functions: as current-conducting paths for power delivery and as electromagnetic shielding structures. By configuring these layers with opposite current directions, they simultaneously perform electrical function and noise cancellation, eliminating the need for separate shielding components and reducing overall device complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces noise associated with switching operations by canceling out magnetic flux, enhancing reliability and compactness while maintaining high integration density without the need for additional noise reduction circuits.
Implementation Method 1
When a current flows through an input wiring (for example, a copper foil pattern from a P potential electrode and an N potential electrode to a switching FET) in an electronic device in which a circuit board with built-in components is used, a magnetic flux in a direction encircling the copper foil pattern is generated (right-handed screw law)
Data Source
Figure 1
Figure 2
Figure 3A~3B
AI summary
s: a first conductive wiring layer (10); a second conductive wiring layer (20) stacked on the first conductive wiring layer (10); an insulating layer (30) formed between the first conductive wiring layer (10) and the second conductive wiring layer (20); at least one pair of semiconductor elements built in the insulating layer (30) and each including a first electrode terminal and a second electrode terminal. The first electrode terminal (41) of a first semiconductor element (40), which is one of the pair of the semiconductor elements, is connected to the first conductive wiring layer (10), the second electrode terminal (52) of a second semiconductor element (50), which is the other of the pair of semiconductor elements, is connected to the second conductive wiring layer (20), and the first conductive wiring layer (10) and the second conductive wiring layer (20) are formed such that a current flowing through the first conductive wiring layer (10) and a current flowing through the second conductive wiring layer (20) are symmetrical and opposite when viewed from a direction passing through the first conductive wiring layer (10) and the second conductive wiring layer (20).