Embedded Circuit Board Sealing to Reduce Overflow and Warpage

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Existing selective sealing technologies for circuit boards result in low layout utilization, long mold design times, high costs, glue overflow, and warpage due to thermal expansion, especially in large volume or large area sealing, leading to decreased yield rates.

Innovation Solution

A circuit board design with channels and a sealing material layer that embeds multiple electronic components, reducing thickness, improving packaging efficiency, and minimizing glue overflow and warpage by eliminating the need for flow passages and customized molds.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If selective sealing technology is used to reduce module thickness, then packaging efficiency is improved, but layout utilization decreases and mold design time increases

Engineering Contradiction:

Improvemodule thicknessVSAvoidmold design complexity

Core Design Contradiction:

Volume of moving objectVSDevice complexity

Solution Approach 1:

The patent makes the circuit board itself serve multiple functions: it acts as both the structural substrate and the sealing container. By forming sealed cavities directly within the circuit board structure, the board performs both electrical connection and component encapsulation functions, eliminating the need for separate custom molds and achieving universal applicability across different component configurations.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent extracts the sealing function from the traditional mold structure and transfers it to the circuit board itself. By removing the complex external mold system and integrating sealing capabilities directly into the board through internal cavity formation, the solution eliminates mold design complexity while maintaining thickness reduction benefits.

Inventive Principle:

Principle #2Taking out (Extraction)

2Reliability

If traditional molds are used for selective sealing, then sealing is achieved, but glue overflow occurs due to height differences

Engineering Contradiction:

Improvesealing qualityVSAvoidglue overflow control

Core Design Contradiction:

ReliabilityVSManufacturing precision

Solution Approach 1:

Instead of using an external mold to contain the sealing material from above, the patent inverts the approach by forming sealed cavities within the circuit board structure itself. The sealing material is contained within pre-formed internal cavities, reversing the traditional containment approach and eliminating glue overflow caused by height differences between components and the mold surface.

Inventive Principle:

Principle #13The other way round (Inversion)

3Quantity of substance

If large volume or large area sealing is performed, then more components are sealed, but warpage increases due to thermal expansion

Engineering Contradiction:

Improvenumber of sealed componentsVSAvoidmodule warpage

Core Design Contradiction:

Quantity of substanceVSStability of the object's composition

Solution Approach 1:

The patent applies local quality by creating distributed, smaller sealed cavities within the circuit board rather than one large sealed area. This segmentation of the sealing regions into multiple local zones reduces the cumulative thermal expansion stress that causes warpage, while still achieving sealing of multiple components throughout the board structure.

Inventive Principle:

Principle #3Local quality

4Quantity of substance

If multiple sealing operations are performed for double-sided or embedded sealing, then more components are sealed, but warpage is aggravated and yield rate decreases

Engineering Contradiction:

Improvenumber of sealed componentsVSAvoidyield rate

Core Design Contradiction:

Quantity of substanceVSProductivity

Solution Approach 1:

The patent merges multiple sealing operations into a single integrated process by forming all sealed cavities within the circuit board structure during board manufacturing. This consolidation eliminates the need for separate sequential sealing operations, reducing cumulative thermal stress and warpage while improving overall productivity and yield rate.

Inventive Principle:

Principle #5Merging (Combining)

Data Source

PatentUS20260032819A1Circuit board and manufacturing method thereof

Publication Date: 2026.01.29 AVARY HLDG (SHENZHEN) CO LTD

AI summary

A circuit board includes a first wiring substrate, a second wiring substrate, a channel, a first electronic component, a second electronic component and a sealing material layer. The first wiring substrate includes a first wiring layer and a second wiring layer. The second wiring substrate is disposed on one side of the first wiring substrate. The channel extends through the first wiring substrate and the second wiring substrate. The first electronic component is disposed in the channel and is electrically connected to the first wiring layer. The second electronic component is disposed in the channel and is electrically connected to one of the first wiring layer and the second wiring layer. The sealing material layer fills the channel and covers the first electronic component and the second electronic component.