Embedded Bridge PCB for High-Speed Signal Routing
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Solution Overview
Problem
Legacy printed circuit board (PCB) designs for mobile electronic devices face challenges in reducing size and increasing speed between processing units and memory, due to limitations in signal routing and electromagnetic interference.
Innovation Solution
The implementation of a bridge PCB formed within the top two metal layers of a main PCB, using a modified semi-additive process (mSAP), to provide high-speed data connections between dies on the main PCB, optimizing signal routing and reducing electromagnetic interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a legacy PCB design is used with standard signal routing, then the device size can be maintained, but the signal speed between processing units and memory is limited and electromagnetic interference increases
Solution Approach 1:
The patent embeds a bridge PCB within the metal layers of a main PCB, creating a nested structure where the bridge PCB is positioned between the first and second metal layers. This nesting approach allows high-speed signal routing to be integrated within the existing PCB layer structure, improving signal speed between SOC and memory while avoiding the need for additional external PCB layers or components.
Solution Approach 2:
The invention transitions from traditional planar PCB routing to three-dimensional embedded routing by placing the bridge PCB within the vertical space between metal layers. This dimensional change enables shorter signal paths and better signal integrity by routing high-speed signals through the embedded bridge PCB rather than through the conventional planar layers, thereby increasing signal speed without proportionally increasing device footprint.
2Speed
If the distance between SOC and memory dies is reduced, then data transfer speed increases, but electromagnetic interference and signal integrity challenges worsen
Solution Approach 1:
The bridge PCB acts as an intermediary structure between the SOC and memory dies, providing dedicated high-speed signal routing pathways. By embedding this intermediary bridge PCB within the metal layers, the patent creates controlled impedance paths and shielding structures that enable reduced distance between SOC and memory while maintaining signal integrity and reducing electromagnetic interference through proper layer stacking and grounding.
3Reliability
If more PCB layers are added to improve signal routing, then signal integrity improves, but device size and manufacturing cost increase
Solution Approach 1:
The patent merges the bridge PCB structure with the main PCB by embedding it within the existing metal layers. This consolidation allows high-speed signal routing capabilities to be integrated into the standard PCB layer structure without adding external layers or increasing PCB footprint. The bridge PCB utilizes the vertical space between metal layers, combining multiple functions (signal routing, shielding, grounding) within the existing PCB architecture, thereby maintaining signal integrity without increasing device area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables a reduction in the number of PCB layers, decreases the distance between system on chip (SOC) and memory dies, increases maximum available memory speed, and reduces overall system cost while maintaining signal integrity.
Implementation Method 1
the required lines are exposed and are added by electroplating
Data Source
AI summary
Embodiments herein relate to systems, apparatuses, techniques, or processes for forming a bridge PCB within one or more metal layers of a main PCB. The bridge PCB, which may be manufactured using mSAP techniques, may be formed between the first and the second metal layers of the main PCB and may be used for high speed signal routing between two dies, such as a system-on-chip die and a memory die, that are on the main PCB and coupled by the bridge PCB. Other embodiments may be described and/or claimed.


