Embedded Bridge TSV Bonding for High-Current Chiplet Packaging
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Solution Overview
Problem
Existing embedded bridge solutions in chiplet architectures face limitations in power delivery due to the inability of traditional solder interconnects to handle high current capacity, leading to increased standoff height, routing complexity, and reliability issues such as voids in underfill material.
Innovation Solution
The implementation of a hybrid bonding architecture that uses direct copper-to-copper bonding and dielectric-to-dielectric bonding, incorporating materials like gold or silver for high current carrying capacity, and employing porous bump architectures to simplify assembly and reduce voids.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional solder interconnects are used in embedded bridge architectures, then the bridge can be integrated into the package substrate, but the current carrying capacity is limited and the standoff height increases
Solution Approach 1:
The patent changes the material parameter from traditional solder to copper interconnects, which have superior electrical conductivity and current carrying capacity. This material substitution directly addresses the limitation of solder while reducing the required standoff height, as copper can achieve the same electrical performance with thinner interconnect structures.
Solution Approach 2:
The patent employs a hybrid bonding architecture that combines copper interconnects with dielectric materials and bonding interfaces. This composite structure integrates the high conductivity of copper with the mechanical and insulating properties of dielectrics, achieving both high current capacity and reduced standoff height through optimized material composition and layering.
2Area of stationary object
If traces are routed over the bridge to provide power, then power can be delivered within the bridge footprint, but routing complexity increases and power delivery path length increases
Solution Approach 1:
The patent transitions from two-dimensional trace routing on the bridge surface to three-dimensional power delivery through vertical vias that pass through the bridge thickness. This dimensional change allows power to be delivered directly through the bridge structure rather than around its perimeter, reducing path length and simplifying routing while maintaining compact footprint.
Solution Approach 2:
The patent extracts the power delivery function from the lateral trace routing path and implements it through dedicated vertical via structures. By separating the power delivery path from the signal routing traces, the design simplifies the overall routing complexity while maintaining efficient power delivery within the bridge footprint.
3Reliability
If tight pitches and small gaps are used in bridge interconnects, then current capacity can be increased, but underfill dispensing becomes difficult and voids increase
Solution Approach 1:
The patent utilizes porous bump architectures where the bump structures contain controlled porosity. This porous design allows underfill material to penetrate and fill the interconnect regions more effectively, ensuring uniform distribution even in tight pitch configurations. The porous structure acts as a wick that draws in the underfill, preventing void formation while maintaining high current capacity through the dense interconnect layout.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the current carrying capacity, reduces routing complexity, and improves underfill uniformity, thereby increasing the reliability and performance of the package substrate by directly addressing the limitations of traditional solder interconnects.
Implementation Method 1
hybrid bonding architecture that uses direct copper-to-copper bonding
Implementation Method 2
dielectric-to-dielectric bonding
Data Source
Figure 1A~1B
Figure 2A
Figure 2B
AI summary
Embodiments disclosed herein include bridge structures for package substrates. In an embodiment, a package substrate comprises a substrate that is a dielectric material. In an embodiment, a cavity is formed into the substrate. A first pad is on a bottom surface of the cavity, and a die is at least partially in the cavity. In an embodiment, a via passes through at least a portion of a thickness of the die, and a second pad is on the die. In an embodiment, the second pad directly contacts the first pad, and the first pad is the only electrically conductive structure between the via and the second pad.