Embedded Bump IC Package for High-Speed Signal Transmission

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Solution Overview

Problem

Conventional Chip-On-Board (COB) packages have long bonding wires and complex manufacturing processes, making them unsuitable for high-speed applications, which require thinner and lighter profiles with shorter electrical conductive paths.

Innovation Solution

The implementation of a substrate with bump-accommodating holes and meshed inner pads allows for embedded bumps to establish electrical connections during the die-attaching step, eliminating the need for wire bonding and simplifying the manufacturing process, while using a soldering layer with a melting point under 400°C for bonding at lower temperatures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If conventional COB package with bonding wires is used, then electrical connection between chip and substrate is achieved, but bonding wire length is too long causing unsuitability for high-speed applications

Engineering Contradiction:
Improvesignal transmission speedVSAvoidbonding wire length
Core Design Contradiction:
SpeedVSLength of moving object

Solution Approach 1:

The patent extracts and eliminates the bonding wire component from the conventional COB package structure. Instead of using separate bonding wires to connect chip bumps to substrate pads, the invention integrates the electrical connection function directly into the die-attaching process through embedded bumps that contact inner pads during substrate bonding, thereby removing the source of long conductive paths

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent merges the die-attaching process with the electrical connection process. The bumps on the chip are embedded into bump-accommodating holes in the substrate during the die-attaching step itself, combining mechanical attachment and electrical connection into a single integrated process that eliminates separate wire bonding steps

Inventive Principle:
Principle #5Merging (Combining)

2Ease of manufacture

If conventional COB package manufacturing process is used, then chip and substrate are connected, but manufacturing process is too complicated

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidmanufacturing process complexity
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent combines multiple manufacturing steps into fewer integrated processes. The die-attaching step simultaneously achieves mechanical bonding and electrical connection by embedding bumps into substrate holes, eliminating the need for separate wire bonding and soldering steps, thereby simplifying the overall manufacturing process

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent prepares the substrate with pre-formed bump-accommodating holes and inner pads before die attachment. This preliminary preparation allows the electrical connection structure to be ready in advance, enabling direct bump embedding during die-attaching without requiring subsequent complex assembly steps

Inventive Principle:
Principle #10Preliminary action

3Length of stationary object

If conventional COB package is used, then electrical connection is established, but package profile is too thick

Engineering Contradiction:
Improvepackage thicknessVSAvoidelectrical connection reliability
Core Design Contradiction:
Length of stationary objectVSEase of operation

Solution Approach 1:

The patent removes the encapsulant layer that traditionally covers the bonding wires in conventional COB packages. By eliminating this thick protective layer and replacing it with a thin conformal coating on the substrate surface, the package profile is significantly reduced while maintaining protection of the embedded bump connections

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent transitions from a three-dimensional wire bonding structure to a two-dimensional planar connection structure. The embedded bumps make direct contact with inner pads on the substrate surface, eliminating the vertical height required for wire arches and encapsulant coverage, thereby reducing package thickness

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

4Reliability

If bumps are embedded in substrate without meshed inner pads, then electrical connection is achieved, but bondibility of bumps is insufficient

Engineering Contradiction:
Improvebump bondibilityVSAvoidinner pad structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies a meshed structure specifically to the inner pads located at the bottom of bump-accommodating holes, while the rest of the substrate maintains its conventional structure. This localized meshed design enhances bump bondibility only where needed for electrical connection, without adding unnecessary complexity elsewhere in the package

Inventive Principle:
Principle #3Local quality

5Temperature

If conventional bonding temperature is used, then bumps are bonded to substrate, but bonding temperature is too high

Engineering Contradiction:
Improvebonding temperatureVSAvoidbump bonding strength
Core Design Contradiction:
TemperatureVSReliability

Solution Approach 1:

The patent changes the material composition of the soldering layer to enable bonding at lower temperatures. By using a eutectic solder alloy with a melting point of 400°C or lower, the bonding process can be performed at reduced temperatures while maintaining reliable bump-to-substrate connections, which is beneficial for heat-sensitive applications

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in a thinner, lighter IC package with shorter electrical paths, enhanced bondibility, and reduced manufacturing complexity, suitable for high-speed applications with lower packaging costs.

Implementation Method 1

A soldering layer with a melting point under 400°C is formed on the inner pads

Methodology Applied
Scientific EffectMelting: Melting

Implementation Method 2

The bumps are electrically connected to the inner pads by the soldering layer

Methodology Applied
Scientific EffectSoldering: Soldering

Data Source

PatentUS7642639B2COB type IC package to enhanced bondibility of bumps embedded in substrate and method for fabricating the same
Publication Date: 2010.01.05 CHIPOS TECH BERMUDA
  • US7642639B2 patent drawing
  • US7642639B2 patent drawing
  • US7642639B2 patent drawing

AI summary

An IC package to enhance the bondibility of embedded bumps, primarily includes a substrate having a plurality of bump-accommodating holes, a bumped chip, an encapsulant, and a plurality of external terminals. The substrate further has a plurality of inner pads at one ends of the bump-accommodating holes respectively. The inner pads may be meshed or a soldering layer is disposed thereon for improving bump connection. The chip is attached to the substrate with the bumps aligned and embedded in the corresponding bump-accommodating holes. The encapsulant is at least formed on a lower surface of the substrate to encapsulate the meshes or the soldering layer. By the suspended meshes or/and the soldering layer, the bumps can be easily bonded at lower temperatures to simplify the manufacturing process with shorter electrical conductive paths and thinner package profiles without wire sweeping.