Embedded Bumps in Encapsulant for Semiconductor Die
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Solution Overview
Problem
Semiconductor devices, particularly thin die, are susceptible to chipping and cracking, and die pad contamination during manufacturing and handling, which affects their robustness and reliability.
Innovation Solution
A method involving the formation of bumps on semiconductor wafers, followed by encapsulation and interconnect structure formation, which embeds these bumps within an encapsulant to provide mechanical support and reduce contamination risks, thereby enhancing the robustness of semiconductor die.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If thin semiconductor die are used to reduce device footprint and improve efficiency, then productivity and performance are improved, but the die become susceptible to chipping and cracking along the active surface
Solution Approach 1:
The patent applies beforehand cushioning by forming a layer of encapsulant material over the bumps on the active surface of the semiconductor die before subsequent manufacturing steps. This encapsulant layer acts as a cushioning protective layer that prevents chipping and cracking of the thin die during handling and manufacturing processes, allowing the use of thinner die for improved productivity while maintaining reliability.
2Area of moving object
If thin semiconductor die are used to reduce footprint, then device size is reduced, but the die contact pads become contaminated from residue from die attach adhesive
Solution Approach 1:
The patent applies preliminary action by forming the encapsulant layer over the bumps and contact pads on the active surface before the die attach adhesive application step. This preliminary encapsulation creates a protective barrier that prevents contamination of the contact pads from adhesive residue, enabling the use of thinner die with smaller footprint while maintaining contact pad cleanliness.
3Device complexity
If conventional manufacturing processes are used without embedded bumps, then device complexity is lower, but stress relief and support are insufficient leading to die chipping and cracking
Solution Approach 1:
The patent forms bumps on the active surface of the semiconductor die during the front-end manufacturing process, before back-end packaging operations. This preliminary formation of bumps provides built-in stress relief and structural support to the die, enhancing strength and resistance to chipping and cracking without requiring additional complex manufacturing steps later in the process.
Data Source
AI summary
A semiconductor wafer contains a plurality of semiconductor die. A plurality of bumps is formed on the semiconductor wafer. The bumps are electrically connected to contact pads on an active surface of the die. The bumps can also be pillars or stud bumps. A first encapsulant is deposited over the bumps. The semiconductor wafer is singulated to separate the die by cutting channels partially through the wafer and back grinding the wafer down to the channels. A second encapsulant is deposited over the die. A first interconnect structure is formed over a first surface of the second encapsulant. The first interconnect structure is electrically connected to the bumps. A second interconnect structure is formed over a second surface of the second encapsulant. Secondary semiconductor components can be stacked over the second interconnect structure. A third encapsulant is deposited over the stacked secondary components and second interconnect structure.