Embedded Capacitor Semiconductor Package for Crack-Resistant Fan-Out Mounting
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Solution Overview
Problem
Conventional Land-Side Capacitors (LSC) used as decoupling capacitors in fan-out packages are prone to cracking during surface mounting due to their thinness, and they have limited capacitance.
Innovation Solution
A semiconductor package design that includes a support substrate with a cavity housing a capacitor, a redistribution wiring layer connecting the capacitor electrodes to the substrate's connection wirings, and a semiconductor chip mounted on the redistribution wiring layer, enhancing structural integrity and capacitance without requiring integrated passive devices or ultra-thin capacitors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a Land-Side Capacitor (LSC) is disposed on the outer surface with solder balls, then the capacitor can be mounted in a fan out package, but the capacitor must be relatively thin which causes cracks during surface mounting
Solution Approach 1:
The capacitor is moved from a surface-mounted configuration to an embedded configuration within the support substrate. This dimensional change from 2D surface mounting to 3D embedding allows the capacitor to have sufficient thickness for structural integrity while maintaining electrical connectivity through vertical vias and redistribution wiring layers.
Solution Approach 2:
The capacitor is nested within a cavity formed in the support substrate. This nesting approach embeds the capacitor inside the substrate structure, protecting it from mechanical stress during surface mounting while maintaining its electrical function through connections to the surface wiring layers.
2Adaptability or versatility
If a Land-Side Capacitor (LSC) is disposed on the outer surface with solder balls, then the capacitor can be mounted in a fan out package, but the capacitance is limited
Solution Approach 1:
By embedding the capacitor vertically within the substrate rather than mounting it horizontally on the surface, the design enables increased capacitance through greater electrode surface area and optimized dielectric volume, while maintaining compatibility with fan out package mounting requirements.
Solution Approach 2:
The nested embedding of the capacitor within the substrate cavity allows for increased capacitance by enabling thicker capacitor structures and larger electrode areas without increasing the package footprint, thus improving the quantity of capacitive material while maintaining mounting adaptability.
3Length of moving object
If an ultra-thin capacitor is used to maintain thin profile, then the capacitor can be surface mounted, but cracks occur during surface mounting
Solution Approach 1:
Instead of making the capacitor thin to enable surface mounting, the invention inverts the approach by embedding a thicker, structurally sound capacitor within the substrate. This reverses the conventional thin-profile requirement by providing structural support from the substrate itself, allowing the capacitor to have optimal thickness for strength without compromising mountability.
4Quantity of substance
If integrated passive devices are used to increase capacitance, then the capacitance increases, but the device complexity and cost increase
Solution Approach 1:
The capacitor is merged with the support substrate by embedding it within the substrate's cavity. This integration combines the capacitor structure with the substrate's wiring and support layers, eliminating the need for separate integrated passive device structures and reducing overall device complexity while maintaining increased capacitance.
Solution Approach 2:
The support substrate serves multiple functions: it provides mechanical support, contains embedded connection wirings, houses the capacitor within its cavity, and provides redistribution wiring layers for electrical connectivity. This multi-functionality eliminates the need for separate integrated passive device structures, reducing complexity while achieving increased capacitance.
Data Source
AI summary
A semiconductor package includes a support substrate having connection wirings disposed therein. At least one capacitor is disposed on the support substrate. The capacitor has first and second electrodes that are exposed from an upper surface of the support substrate. A redistribution wiring layer covers the upper surface of the support substrate. The redistribution wiring layer has redistribution wirings electrically connected to the connection wirings and the first and second electrodes respectively. A semiconductor chip is disposed on the redistribution wiring layer. The semiconductor chip has chip pads that are electrically connected to the redistribution wirings and outer connectors disposed on a lower surface of the support substrate and electrically connected to the connection wirings.