Package-Embedded Thin-Film Capacitors and Magnetic Inductors
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Solution Overview
Problem
Semiconductor device miniaturization poses challenges in fitting sufficient passives near semiconductive devices on package substrates due to space competition, particularly in integrating thin-film capacitors and magnetic inductors effectively.
Innovation Solution
The integration of package-embedded thin-film capacitors (eTFCs) and package-integral magnetic inductors (iMLs) within a semiconductor package substrate, where eTFCs are assembled on a lithography surface with a build-up film, and iMLs are formed by covering an inductor-core trace with magnetic particle paste, allowing for efficient use of space and minimizing Z-height issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional packaging methods are used to fit sufficient passives near semiconductive devices, then the quantity of passive components is increased, but the available space on semiconductor package substrates is insufficient
Solution Approach 1:
The patent transitions from planar surface mounting to three-dimensional embedding within the substrate layers. Build-up films are formed with recesses that accommodate capacitors and inductors in vertical cross-section, utilizing the Z-dimension to increase component density without expanding the substrate footprint. This dimensional transition allows multiple passive components to be integrated within the substrate volume rather than only on its surface.
Solution Approach 2:
Passive components are nested within the multi-layer substrate structure. Capacitors are seated in recesses of build-up films and embedded within substrate layers, while inductors are formed with traces embedded in build-up films and magnetic particle bodies filling recesses. This nesting approach allows components to be housed within the substrate's internal volume, effectively increasing the quantity of passives without proportionally increasing the substrate area.
2Area of stationary object
If thin-film capacitors are integrated into the package substrate, then space utilization is improved, but Z-height issues arise due to component embedding
Solution Approach 1:
The substrate structure is locally adapted to accommodate capacitor Z-height variations. Build-up films are formed with recesses at specific locations where capacitors are to be embedded, allowing the capacitor to be seated within the recess rather than protruding above the substrate surface. This localized structural modification enables space-efficient capacitor integration while controlling the overall package height.
Solution Approach 2:
The substrate is segmented into multiple layers including build-up films with recesses, allowing capacitors to be embedded at different depths. The build-up film is divided into regions with and without recesses, enabling selective embedding of passive components while maintaining a relatively flat top surface for subsequent processing and wiring.
3Reliability
If magnetic inductors are formed with extended traces, then inductance is increased, but the inductive path length increases causing performance degradation
Solution Approach 1:
The inductor trace is extended in the vertical Z-dimension by embedding it within the multi-layer substrate structure. The trace winds through build-up films and substrate layers, utilizing the third dimension to achieve longer effective inductance paths without increasing the planar footprint. This three-dimensional trace routing allows sufficient inductance to be achieved while keeping the inductive path compact in the X-Y plane.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables efficient use of space on semiconductor package substrates, subsuming Z-height issues for capacitors and long-inductive-path issues for inductors, thereby enhancing the packaging efficiency and performance of semiconductive devices.
Implementation Method 1
an integral magnetic inductor is assembled, beginning on the litho surface, where an inductor-core trace is partially covered with a first magnetic particle paste
Implementation Method 2
a thin-film capacitor is seated on the first lithographic surface, and at least partially embedded in the second and adjacent build-up film
Data Source
AI summary
Disclosed embodiments include an embedded thin-film capacitor and a magnetic inductor that are assembled in two adjacent build-up layers of a semiconductor package substrate. The thin-film capacitor is seated on a surface of a first of the build-up layers and the magnetic inductor is partially disposed in a recess in the adjacent build up layer. The embedded thin-film capacitor and the integral magnetic inductor are configured within a die shadow that is on a die side of the semiconductor package substrate.