Embedded Charge Pump Voltage Regulator Die Area Reduction

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Solution Overview

Problem

Existing voltage regulators, particularly those using power field-effect transistors (FETs), face challenges in reducing die area and quiescent current consumption, especially when employing NMOS FETs, which require higher gate drive voltages and result in increased die area and ripple noise.

Innovation Solution

The implementation of an embedded charge pump within the voltage regulator design, which includes a capacitor switchably coupled to the gate terminal of a power FET and an operational transconductance amplifier, allows for reduced die area usage and low quiescent current consumption by operating in retention and charging modes, utilizing the capacitor as both a flying capacitor and compensation capacitor, and functioning as a proportional-integral (PI) controller.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If NMOS FET is used in voltage regulator, then higher gate drive voltage is achieved, but die area and ripple noise increase

Engineering Contradiction:

Improvegate drive voltageVSAvoiddie area

Core Design Contradiction:

Use of energy by moving objectVSArea of stationary object

Solution Approach 1:

The charge pump circuit is merged with the voltage regulator output stage, sharing common transistors and nodes. The first and second charge pump circuits are integrated within the regulator, eliminating the need for separate external charge pump circuits, thereby reducing overall die area while maintaining the required gate drive voltage for NMOS FET operation

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The embedded charge pump circuits serve multiple functions: they provide the necessary gate drive voltage for the NMOS pass transistor, act as compensation circuits for stability, and function as part of the output stage. This multi-functionality reduces the need for separate dedicated circuits, thereby reducing die area

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Device complexity

If traditional voltage regulator design is used, then simplicity is maintained, but quiescent current consumption increases

Engineering Contradiction:

Improveregulator structureVSAvoidquiescent current

Core Design Contradiction:

Device complexityVSUse of energy by stationary object

Solution Approach 1:

The regulator employs dynamic control mechanisms where the embedded charge pump circuits can be enabled or disabled based on operating conditions. The circuit dynamically adjusts its operation mode between retention mode (for low quiescent current) and charging mode (for active charge pumping), optimizing power consumption across different load conditions

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The charge pump circuits operate in periodic switching modes rather than continuous operation. The circuit alternates between retention mode with minimal current consumption and charging mode with active charge pumping, reducing average quiescent current while maintaining voltage regulation performance

Inventive Principle:

Principle #19Periodic action

3Use of energy by moving object

If separate charge pump circuit is used, then gate drive voltage is provided, but die area increases

Engineering Contradiction:

Improvegate drive voltageVSAvoiddie area

Core Design Contradiction:

Use of energy by moving objectVSArea of stationary object

Solution Approach 1:

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The charge pump circuits are nested within the voltage regulator structure, with the charge pump transistors and capacitors embedded among the regulator's output stage components. This nesting arrangement allows shared use of circuit elements and minimizes the total area occupied by both functions

Inventive Principle:

Principle #7Nested doll (Nesting)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces die area usage, minimizes quiescent current during static loads, and enhances stability by modulating transconductance, thereby improving the overall efficiency and performance of the voltage regulator.

Implementation Method 1

a capacitor switchably coupled to the gate terminal of the power FET

Methodology Applied

Scientific EffectCapacitance: Capacitance

Implementation Method 2

an operational transconductance amplifier switchably coupled to the capacitor

Methodology Applied

Scientific EffectTransconductance:

Data Source

PatentUS10333393B2Embedded charge pump voltage regulator

Publication Date: 2019.06.25 QUALCOMM INC

AI summary

Certain aspects of the present disclosure provide methods and apparatus for implementing a voltage regulator. The voltage regulator includes a power field effect transistor (FET) comprising a gate terminal. The voltage regulator further includes a charge pump, the charge pump comprising a capacitor switchably coupled to the gate terminal. The voltage regulator further includes a current outputting amplifier switchably coupled to the capacitor.