Embedded Semiconductor Chip Carrier Board Protection Layer

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Solution Overview

Problem

Existing circuit board structures face challenges in protecting semiconductor chip connection metal pads from oxidation and contamination, which can affect electrical quality and increase processing costs.

Innovation Solution

A fabrication method involving a protection layer made of polyimide, epoxy, or benzocyclobutene is applied to the semiconductor wafer before cutting, covering the connection metal pads, and a dielectric layer is used to expose these pads during the embedding process, ensuring protection and reliable electrical connections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a connection metal layer is formed on electrode pads by electroplating to protect from oxidation and contamination, then the electrode pads are protected, but the exposed surface of the connection metal layer is oxidized by air affecting electrical quality

Engineering Contradiction:

Improveprotection of electrode padsVSAvoidoxidation of connection metal layer

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

A protection layer is formed on the connection metal layer before the chip is mounted on the carrier board. This preliminary protective measure ensures that the connection metal layer is already protected from oxidation and contamination during subsequent processing steps, eliminating the oxidation problem while maintaining protection functionality

Inventive Principle:

Principle #10Preliminary action

2Reliability

If the connection metal layer is exposed to allow electrical connection, then electrical connectivity is achieved, but the connection metal layer is oxidized by air

Engineering Contradiction:

Improveelectrical connectionVSAvoidoxidation during exposure

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The protection layer is selectively removed only at the specific locations where electrical connection is needed, while maintaining protection over the rest of the connection metal layer. This localized exposure approach allows electrical connectivity to be achieved at connection points without causing oxidation of the entire connection metal layer surface

Inventive Principle:

Principle #3Local quality

3Reliability

If electroplating is used to form connection metal layer for protection, then electrode pads are protected from oxidation, but processing complexity and cost increase

Engineering Contradiction:

Improveprotection from oxidationVSAvoidfabrication process complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The material composition or structural parameters of the protection layer are optimized to provide effective protection with simpler processing. By adjusting the protection layer's properties, the need for complex electroplating processes is reduced, achieving protection with lower fabrication complexity and cost

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method effectively prevents oxidation and contamination of connection metal pads, simplifies the fabrication process, and enhances the reliability and quality of the semiconductor chip-embedded circuit board structure.

Implementation Method 1

protects the connection metal pads on the surface of the electrode pads of a semiconductor chip from oxidation

Methodology Applied

Scientific EffectOxidation prevention: Oxidation

Implementation Method 2

a dielectric layer is used to expose these pads during the embedding process, ensuring protection and reliable electrical connections

Methodology Applied

Scientific EffectPhysical containment: Physical Containment

Data Source

PatentUS8354338B2Carrier board structure with embedded semiconductor chip and fabrication method thereof

Publication Date: 2013.01.15 UNIMICRON TECH CORP

AI summary

A circuit board structure with an embedded semiconductor chip and a fabrication method thereof are provided, including the steps of providing a semiconductor wafer having an active surface with a plurality of electrode pads, a connection metal layer formed on the electrode pads: forming a protective layer on the connection metal layer and the semiconductor wafer, performing a cutting process to form a plurality of semiconductor dies, providing a carrier board having at least one cavity for receiving the semiconductor chip; and forming sequentially on the protective layer covering the semiconductor chip and the carrier board a dielectric layer and a circuit layer electrically connected to the connection metal layer of the semiconductor chip. The present invention is a simple, in process and low in process cost, due to the connection metal layer covered by the protective layer formed on the semiconductor chip protected from oxidation and contamination.