Embedded Chip Package With Photosensitive Via-Posts for Dual-Side Routing
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Solution Overview
Problem
Existing chip packaging methods, such as laser drilling and dry etching, face challenges in forming openings for heat dissipation and electrical connections, particularly for high aspect ratio devices, due to damage risks and low efficiency, and expose glass fibers, leading to reliability and efficiency issues.
Innovation Solution
The use of photosensitive polymer dielectric material to fill gaps between chips and frames, forming via-posts for electrical and thermal connections, allowing for simultaneous patterning and electroplating to create conductive layers without damaging the chip structure and avoiding glass fiber exposure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If laser drilling is used to form openings on thermosetting dielectric packaging material, then electrical connections can be achieved, but the high laser energy damages thin metal pads and terminals on chips without high aspect ratio conduction posts
Solution Approach 1:
The patent introduces a photosensitive polymer dielectric material as an intermediary between the laser drilling process and the chip structure. This material has higher damage threshold and allows controlled opening formation without directly exposing the thin metal pads and terminals to high energy laser radiation, thus protecting the chip structure while still enabling electrical connections.
Solution Approach 2:
The patent changes the material parameter from traditional thermosetting dielectric to photosensitive polymer dielectric, which has different optical and thermal properties. This material can be selectively cured by light to form openings, allowing lower energy processing that doesn't damage the thin metal structures on chips.
2Reliability
If plasma dry etching is used to open chip back face for both sides conduction, then electrical connections can be achieved, but the etching time is excessively long (50-150 min) reducing manufacturing efficiency
Solution Approach 1:
The patent replaces the mechanical/chemical plasma dry etching process with a photolithography-based opening formation process. Instead of using plasma to physically remove material over extended periods, the photosensitive polymer is selectively cured by light exposure and then removed to form openings, dramatically reducing processing time from 50-150 minutes to a fraction of that time.
Solution Approach 2:
The patent utilizes the phase transition property of photosensitive polymer dielectric material that changes from uncured to cured state upon light exposure. This allows precise control of opening formation through selective curing, enabling rapid and efficient creation of conduction paths without the time-consuming plasma etching process.
3Manufacturing precision
If plasma dry etching is used to form small vias (diameter < 200 μm), then electrical connections can be achieved, but the gas exchange rate is low causing poor via bottom quality and reduced heat/electric conduction performance
Solution Approach 1:
The patent replaces plasma dry etching with a photolithography-based opening formation method for small vias. The light-curing process provides superior control over via dimensions and geometry, ensuring consistent diameter and roundness. The resulting via openings have excellent quality with proper bottom formation, enabling reliable heat and electric conduction that plasma etching cannot achieve in small dimensions.
4Ease of manufacture
If traditional packaging material is used with laser drilling or dry etching, then openings can be formed, but glass fibers are exposed leading to weakened fine circuits and electromigration channels
Solution Approach 1:
The patent introduces photosensitive polymer dielectric material as a protective intermediary layer that prevents glass fiber exposure during opening formation. This material fills and protects the underlying glass fiber structure, and when selectively removed to form openings, it does so without exposing the glass fibers that would otherwise be vulnerable to damage and electromigration.
Solution Approach 2:
The patent uses a composite packaging structure where the photosensitive polymer dielectric is combined with the traditional glass fiber reinforced packaging material. The photosensitive polymer layer acts as a protective and functional interface that maintains the integrity of the glass fiber structure while enabling controlled opening formation for electrical connections.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enhances manufacturing efficiency, reduces damage risks, and improves yield rates by forming conductive and heat dissipation paths effectively, while maintaining the structural integrity of the chip and preventing glass fiber exposure, thus improving packaging reliability and efficiency.
Implementation Method 1
a photosensitive polymer dielectric material as the packaging material
Implementation Method 2
simultaneous patterning and electroplating to create conductive layers
Data Source
AI summary
An embedded chip package according to an embodiment of the present application may include at least one chip and a frame surrounding the at least one chip, the chip having a terminal face and a back face separated by a height of the chip, the frame having a height equal to or larger than the height of the chip, wherein the gap between the chip and the frame is fully filled with a photosensitive polymer dielectric, the terminal face of the chip being coplanar with the frame, a first wiring layer being formed on the terminal face of the chip and a second wiring layer being formed on the back face of the chip.