Embedded Chiplet Assembly With Backside Power Delivery
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Solution Overview
Problem
As semiconductor devices shrink, power delivery becomes increasingly inefficient due to electrical isolation issues, high density of circuit elements, and signal interference, making it challenging to provide power effectively, especially with traditional frontside power delivery methods.
Innovation Solution
The implementation of a backside power delivery network that separates power delivery from signal routing, using hybrid bonding and insulating materials like silicon oxide or organic dielectrics to connect power or ground contacts on the backside of semiconductor substrates, reducing the need for metal layers on the frontside and minimizing signal interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If frontside power delivery methods are used, then power can be delivered to circuit elements, but power losses increase and signal integrity deteriorates due to interference between power and signaling lines
Solution Approach 1:
The patent divides the power delivery function from the signal routing function by delivering power through the backside of the substrate while signals are routed on the frontside. This segmentation separates the two functions spatially, eliminating interference between power and signal lines while reducing power losses in the interconnect paths
Solution Approach 2:
The patent transitions from planar power delivery on the frontside to three-dimensional power delivery through the backside of the substrate. By utilizing the vertical dimension and backside access, power can be delivered directly to active regions without traversing multiple metal layers, thereby reducing resistive losses and eliminating electromagnetic interference with signal lines
2Quantity of substance
If feature sizes are reduced to increase density, then more circuit elements can be packed, but power delivery efficiency decreases due to electrical isolation issues and high density of interconnects
Solution Approach 1:
The patent segments the substrate into frontside (for high-density signal routing) and backside (for power delivery). This allows independent optimization of each layer: the frontside can achieve high circuit element density with fine-pitch interconnects, while the backside provides dedicated power paths that are not constrained by the high-density signal routing requirements
Solution Approach 2:
The substrate itself acts as an intermediary structure that enables both high-density frontside circuitry and efficient backside power delivery. Through carefully designed via structures and bonding interfaces, the substrate mediates between the two opposing requirements, allowing power to be delivered efficiently to densely packed circuit elements without the power paths competing for space with signal interconnects
3Quantity of substance
If tight spacing between interconnects is used to increase density, then more circuits can be integrated, but signal interference increases between power and signaling lines
Solution Approach 1:
The patent segments the interconnect space into two distinct domains: frontside for signal routing and backside for power delivery. This spatial segmentation eliminates electromagnetic coupling between power and signal lines, allowing tight spacing on the frontside for high integration density without suffering from power-signal interference
Solution Approach 2:
By moving power delivery to the backside dimension, the patent removes the harmful electromagnetic interaction that would occur in the same plane. The vertical separation through the substrate eliminates cross-talk and interference while maintaining high integration density on the frontside, as power lines no longer share the two-dimensional plane with signal lines
Data Source
AI summary
An assembly may include a base element comprising a base substrate having a frontside with active circuitry and a backside opposite the frontside, a first bonding layer disposed on the frontside of the base substrate and including a signal pad to convey an electrical signal to the active circuitry. The assembly may further include a first functional element comprising a first semiconductor substrate having a frontside with active circuitry and a backside opposite the frontside, a second bonding layer disposed on the frontside of the first semiconductor substrate, and a back surface of the first functional element having a first contact feature to connect to power or ground, wherein the first bonding layer is hybrid bonded to the second bonding layer.