Embedded Circuit Encapsulant for Low-Profile SIP Modules
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In semiconductor devices, particularly in high-frequency applications like RF wireless communications, the need to reduce footprint and profile while increasing functionality is hindered by the addition of a top side interconnect substrate, which increases manufacturing costs and module height.
Innovation Solution
The formation of an electrical circuit pattern within an encapsulant in a system-in-package (SIP) module, which reduces package thickness and manufacturing steps by embedding the circuit pattern within the encapsulant, thereby eliminating the need for a top interconnect substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a top side interconnect substrate is added to make electrical interconnect on the top of the semiconductor package, then electrical functionality is improved, but the overall height of the SIP module increases
Solution Approach 1:
The patent merges the encapsulant and the top interconnect substrate into a single integrated structure. The encapsulant is formed to include an integrated circuit board portion that provides both protective encapsulation and electrical interconnect functions, eliminating the need for a separate top interconnect substrate and reducing overall module height.
Solution Approach 2:
The encapsulant is designed to serve multiple functions simultaneously: it provides mechanical protection for the semiconductor components, structural support, and electrical interconnect through the integrated circuit board portion. This multi-functionality eliminates the need for additional dedicated interconnect substrates.
2Adaptability or versatility
If a top side interconnect substrate is added to make electrical interconnect on the top of the semiconductor package, then electrical functionality is improved, but manufacturing cost increases
Solution Approach 1:
The patent combines the encapsulant formation process with the circuit board fabrication process, allowing both components to be manufactured simultaneously in an integrated manner. This merging of processes reduces the number of separate manufacturing steps, lowers labor costs, and simplifies production.
Solution Approach 2:
The encapsulant structure is designed to fulfill multiple roles including protection, support, and electrical interconnection. By making the encapsulant multi-functional, the patent eliminates the need for separate interconnect substrates, thereby reducing component count and associated manufacturing costs.
3Area of stationary object
If components are integrated at higher density in a smaller area, then footprint is reduced, but manufacturing complexity increases
Solution Approach 1:
The patent merges the encapsulation process with the circuit board integration process, allowing high-density component placement and encapsulation to occur in an integrated manufacturing flow. This combination simplifies the overall manufacturing complexity despite the high density integration by coordinating processes rather than treating them as separate complex steps.
Data Source
AI summary
A semiconductor device has an electronic component assembly with a substrate and a plurality of electrical components disposed over the substrate. A conductive post is formed over the substrate. A molding compound sheet is disposed over the electrical component assembly. A carrier including a first electrical circuit pattern is disposed over the molding compound sheet. The carrier is pressed against the molding compound sheet to dispose a first encapsulant over and around the electrical component assembly and embed the first electrical circuit pattern in the first encapsulant. A shielding layer can be formed over the electrical components assembly. The carrier is removed to expose the first electrical circuit pattern. A second encapsulant is deposited over the first encapsulant and the first electrical circuit pattern. A second electrical circuit pattern is formed over the second encapsulant. A semiconductor package is disposed over the first electrical circuit pattern.