Embedded Controller Pass-Through Port for Interoperable Firmware Storage
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Solution Overview
Problem
Information handling systems face challenges with increased firmware storage needs due to complex designs, high pin counts, and slow access speeds, leading to increased costs and difficulties in motherboard layout and firmware upgrades.
Innovation Solution
A system and method that utilize a pass-through port in the embedded controller to selectively access and manage chipset firmware stored in SPI flash ROM, allowing the embedded controller to control communications between the ROM, chipset, and embedded controller, enabling firmware updates and diagnostics without interfering with normal operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single SPI flash ROM is used to store firmware for both chipset and embedded controller, then device complexity and cost are reduced, but access speed and communication efficiency deteriorate due to arbitration requirements
Solution Approach 1:
The pass-through port dynamically changes its access mode based on operational requirements. During normal operations, it operates in shadowing mode allowing direct chipset access at full speed. During firmware updates or diagnostics, it switches to arbitration mode where the embedded controller can access the ROM. This dynamic switching resolves the contradiction by providing both high-speed direct access and controlled shared access at different times.
Solution Approach 2:
The pass-through port acts as an intermediary component between the chipset and the shared SPI flash ROM. It mediates access requests from both the chipset and embedded controller, routing them appropriately. This intermediary structure allows a single ROM to serve both purposes without requiring separate flash memory devices, reducing overall system complexity while managing access conflicts.
2Ease of operation
If the embedded controller has direct access to firmware for updates and diagnostics, then ease of operation and maintenance are improved, but normal chipset operations are interfered with
Solution Approach 1:
The access to the shared SPI flash ROM is segmented into distinct operational modes: shadowing mode for normal high-speed chipset operations and arbitration mode for embedded controller firmware updates and diagnostics. This segmentation allows both functions to operate independently without interfering with each other, maintaining system reliability while enabling ease of operation when needed.
Solution Approach 2:
The pass-through port alternates between shadowing mode and arbitration mode based on operational requirements. During normal system operation, shadowing mode is active allowing uninterrupted chipset access. When firmware updates or diagnostics are required, the system periodically switches to arbitration mode, performs the necessary operations, then returns to shadowing mode. This periodic switching maintains reliability during normal operations while enabling maintenance when needed.
3Speed
If separate flash memory is provided for chipset and embedded controller, then access speed and operational independence are improved, but device complexity and cost increase
Solution Approach 1:
The pass-through port is designed with multi-functionality to serve dual purposes: it acts as a shadowing buffer during normal operations to maintain high-speed chipset access to the SPI flash ROM, and simultaneously serves as an arbitration interface when the embedded controller needs to access the same ROM for firmware updates or diagnostics. This universal design eliminates the need for separate flash memory devices while maintaining access speed and operational independence.
Data Source
AI summary
Interoperable firmware for an information handling system supports embedded controller and chipset operations from a common SPI flash ROM. The embedded controller is disposed between the chipset and the flash ROM with a pass through port integrated in the embedded controller selectively providing primary access to firmware by the chipset or the embedded controller. The pass through port provides chipset access to firmware without inducing delays for normal system operations, yet provides an integrated switch for control and access of the firmware by the embedded controller for updating of firmware settings and firmware diagnostics. Application of power to the embedded controller allows access to chipset firmware even where the chipset lacks power, such as during manufacture of the information handling system.