Embedded Controller Unifying Host Interface for Peripheral Protocols
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Solution Overview
Problem
Host device manufacturers face challenges in supporting a diverse range of peripheral devices with varying communication protocols, requiring extensive hardware and software updates, which complicates compatibility and adaptability to new and legacy interfaces.
Innovation Solution
A system that enables communication between a host device and multiple peripheral devices using a single host interface, with a bus controller driver and embedded controller implementing native bus protocols, allowing seamless integration of new protocols without additional hardware support.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If host device manufacturers implement support for multiple bus protocols at the hardware level to maintain compatibility with various peripheral devices, then compatibility with legacy and emerging peripherals is improved, but device complexity and manufacturing costs increase
Solution Approach 1:
The patent introduces an embedded controller as an intermediary device that sits between the host processor and multiple peripheral devices. The embedded controller implements multiple bus protocol support (LPC, I2C, SPI, UART) while the host processor only needs to support a single protocol. This mediator approach allows the host to communicate with diverse peripherals without requiring the host itself to be complex multi-protocol hardware.
Solution Approach 2:
The patent combines multiple bus protocol support capabilities into a single embedded controller unit rather than distributing protocol support across the host processor. By merging LPC, I2C, SPI, and UART support into one dedicated controller, the system reduces overall hardware complexity while maintaining comprehensive peripheral compatibility.
2Adaptability or versatility
If host device manufacturers update software stacks to support new peripheral interfaces, then adaptability to new protocols is improved, but hardware-level support requirements increase complexity
Solution Approach 1:
The patent segments the protocol support functionality from the host processor and places it in the embedded controller. This segmentation allows the host to maintain simple hardware while the embedded controller handles the complexity of multiple protocols. Software updates can be applied to the embedded controller independently without affecting the host processor hardware architecture.
3Reliability
If dedicated processor pins are allocated for each bus protocol to ensure reliable communication, then communication reliability is improved, but the quantity of processor pins and hardware resources increases
Solution Approach 1:
The embedded controller serves as a universal interface that can handle multiple bus protocols (LPC, I2C, SPI, UART) through a single communication channel to the host processor. This multi-functional approach eliminates the need for the host processor to have dedicated pins for each protocol, reducing pin count while maintaining reliable communication through the embedded controller's specialized hardware.
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AI summary
A system, device and method for communicating between a host device and a plurality of peripheral devices wherein the communications utilize a single interface that is supported by the host. The host includes a plurality of class drivers and miniport drivers. Each of the class drivers implements functionality associated with one or more of the plurality of peripheral devices. Each miniport driver provides an interface by which one or more of the class drivers communicate with one or more of the plurality peripheral devices using class protocols, wherein the miniport drivers communicate through a single host interface supported by the host. An embedded controller interfaces with the plurality of peripheral devices using the respective native bus protocols of the peripheral devices and wherein the embedded controller interfaces with the plurality of miniport drivers using the single host interface.