Embedded Cooling Assembly Packaging for Low-Resistance Chip Heat Transfer
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Solution Overview
Problem
Existing cooling systems for microelectronic devices face inefficiencies due to high thermal resistance at interfacial boundaries, which hinder effective heat transfer from chips to heat dissipation devices, leading to reduced cooling efficiency and increased energy consumption.
Innovation Solution
Integrated cooling assemblies are embedded within device packages, directly bonding a cold plate to the semiconductor device without intervening thermal interface materials, forming a coolant channel that is in fluid communication with inlet and outlet openings, thereby reducing thermal resistance and enhancing heat dissipation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If thermal interface materials are used to couple heat dissipation devices to chips, then thermal contact is maintained, but thermal resistance at interfacial boundaries increases, reducing cooling efficiency
Solution Approach 1:
The patent removes thermal interface materials from the heat dissipation system. Instead of using thermal pastes, adhesives, or gap fillers that create thermal resistance, the invention directly couples heat dissipation devices to the chip surface, extracting the problematic intermediate layer that was causing thermal boundary resistance and reducing cooling efficiency.
Solution Approach 2:
The patent merges the heat dissipation device directly with the chip surface by eliminating the thermal interface material layer. This integration creates a direct thermal coupling between the chip and heat dissipation device, reducing thermal resistance and improving heat transfer efficiency through the combined structure.
2Loss of energy
If external heat sinks are used for cooling, then heat dissipation is achieved, but thermal resistance is high and energy consumption increases
Solution Approach 1:
The patent transitions from external heat sinks to embedded cooling channels integrated within the package substrate. By moving the cooling function into a different dimensional space (embedding within the substrate rather than attaching externally), the invention creates shorter thermal pathways and reduces thermal resistance, thereby lowering energy consumption for cooling.
Solution Approach 2:
The patent incorporates cooling channels directly into the package substrate during manufacturing, before final assembly. This preliminary integration of cooling functionality into the substrate structure allows for optimized thermal pathways from the outset, reducing thermal resistance and energy consumption compared to adding external heat sinks after assembly.
3Productivity
If multiple devices are disposed in the same package, then device integration is improved, but thermal communication between devices occurs, reducing cooling efficiency
Solution Approach 1:
The patent segments the package substrate into multiple regions with independently configured cooling channels. Each device can be served by dedicated cooling channels or selectively served by specific channels, preventing thermal communication between devices while maintaining high device integration. This segmentation isolates thermal pathways for each device.
Solution Approach 2:
The patent implements localized cooling channels within the package substrate that can be selectively activated or configured for specific devices. Each region of the substrate can have different thermal management characteristics, allowing devices to be integrated in the same package while maintaining independent thermal control and preventing unwanted thermal communication between adjacent devices.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces thermal resistance by 50× or more compared to external heat sinks, improving energy efficiency and reliability by allowing faster heat dissipation and preventing heat transfer between devices within the same package.
Implementation Method 1
a cold plate attached to the semiconductor device... The cold plate may include a patterned first side and an opposite second side... the base surface is spaced apart from the semiconductor device to collectively define a coolant channel therebetween
Implementation Method 2
The coolant channel is in fluid communication with the inlet opening and the outlet opening through openings disposed through respective portions of the material layer
Data Source
AI summary
A device package may include a package substrate, a package cover disposed on the package substrate, and an integrated cooling assembly disposed between the package substrate and the package cover. The package cover generally has an inlet opening and an outlet opening disposed there through. The integrated cooling assembly includes a semiconductor device and a cold plate attached to the semiconductor device. The device package may include a material layer between the package cover and the cold plate. The cold plate may include a patterned first side and an opposite second side. The patterned first side may include a base surface and sidewalls extending downward from the base surface, where the base surface is spaced apart from the semiconductor device to collectively define a coolant channel. Here, the coolant channel is in fluid communication with the inlet opening and the outlet opening through openings disposed through respective portions of the material layer.