Embedded Die Core Joining for Height-Matched Package Substrates
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Solution Overview
Problem
Advanced IC die packages face challenges in embedding IC dies due to height mismatch between the IC die and the package structure, particularly due to total thickness variation (TTV) in substrate cores and variations in recess or cavity depths, which complicates power delivery and electrical interconnects.
Innovation Solution
A method involving the fusion of thickness-matched substrate cores with cutouts to accommodate IC dies, followed by embedding the IC dies within a core stack, and forming package dielectric and metallization features, allowing for precise alignment and integration of IC dies within a package substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If IC die is embedded within package substrate, then power delivery efficiency and die-to-die interconnect density are improved, but height mismatch between IC die and package structure causes manufacturing difficulties
Solution Approach 1:
The package substrate is divided into multiple layers including a recess region and a fill material layer. The IC die is embedded within the recess, and the fill material is deposited to match the height of surrounding structures, segmenting the height adjustment into discrete layers that can be precisely controlled during manufacturing.
Solution Approach 2:
A recess is formed locally at the embedding location within the package substrate, creating a localized depression that accommodates the IC die. This local modification allows precise height matching at the embedding site without affecting the overall substrate structure, enabling accurate positioning while maintaining manufacturing feasibility.
2Ease of manufacture
If recess depth is increased to accommodate IC die, then embedding feasibility is improved, but variation in recess depth increases total thickness variation
Solution Approach 1:
The recess is formed in advance within the package substrate before IC die embedding. This preliminary structuring allows precise control of the recess depth and dimensions, ensuring that the IC die fits properly while maintaining consistent total thickness variation across multiple substrates through standardized recess formation processes.
Solution Approach 2:
Fill material is deposited into the recess to create an intermediate layer that matches the height of the IC die with the surrounding package substrate. This fill material acts as a mediator that compensates for depth variations, ensuring uniform overall thickness while maintaining the recess structure necessary for proper IC die embedding and alignment.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables efficient power delivery and high-density die-to-die interconnects by ensuring precise alignment and integration of IC dies within the package substrate, addressing height mismatch issues and enhancing device performance.
Implementation Method 1
A first substrate core is fused with a second substrate core into the core stack
Data Source
AI summary
IC device package including an IC die embedded within a package substrate comprising two or more substrate cores. A cutout in a first substrate core exposes a surface of a second substrate core and an IC die is placed within the opening. A package metallization routing structure including conductive vias adjacent to the embedded IC die may be built up and terminate interconnect interfaces. One or more additional IC dies may be assembled with the package substrate, coupling the additional IC dies with the embedded IC die. In some examples, the embedded IC die comprises capacitors implementing a package-level voltage regulator.