Embedded Die Substrate on Interposer for Fine-Pitch Routing Yield
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Solution Overview
Problem
Conventional processes for manufacturing embedded die substrates in microelectronic devices suffer from inconsistencies and yield losses due to variations in bump height and die thickness, exacerbated by reduced bump pitch scaling and increased lateral dimensions, leading to integration complications.
Innovation Solution
The proposed solution involves forming a microelectronic device with an embedded die substrate on an interposer, eliminating most transverse routing layers and allocating redistribution functionality to the interposer, using a single transverse routing layer in the substrate and vertical through contacts, such as through silicon vias, to improve manufacturing yield and dimensional control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional buildup processes with multiple transverse routing layers are used, then routing functionality is provided, but manufacturing precision deteriorates due to variations in bump height and die thickness
Solution Approach 1:
The patent extracts and removes most transverse routing layers from the substrate, retaining only a single transverse routing layer. This simplification eliminates the cumulative manufacturing variations that occur with multiple lamination and metallization steps, thereby improving bump height consistency while still providing necessary routing functionality through the reduced layer count.
Solution Approach 2:
The patent segments the routing functionality by allocating it primarily to the interposer rather than the substrate. This division allows the substrate to focus on providing mechanical support and minimal routing, while the interposer handles complex redistribution, thereby improving overall manufacturing precision and yield.
2Adaptability or versatility
If multiple embedded die are integrated in the substrate, then functionality is enhanced, but device complexity increases leading to integration complications
Solution Approach 1:
The interposer serves as an intermediary between multiple embedded die and the external environment. It provides a standardized interface and routing layer that simplifies the integration of multiple die with different functions and configurations, thereby enhancing versatility without proportionally increasing device complexity.
3Area of moving object
If bump pitch scaling is reduced, then device density is improved, but manufacturing precision deteriorates due to increased sensitivity to variations
Solution Approach 1:
By removing most transverse routing layers and their associated manufacturing steps, the patent reduces the cumulative sources of dimensional variation. This simplification is particularly beneficial for fine-pitch applications where even small variations can cause defects, thereby maintaining high device density while improving dimensional control.
Data Source
AI summary
A microelectronic device is formed to include an embedded die substrate on an interposer; where the embedded die substrate is formed with no more than a single layer of transverse routing traces. In the device, all additional routing may be allocated to the interposer to which the embedded die substrate is attached. The embedded die substrate may be formed with a planarized dielectric formed over an initial metallization layer supporting the embedded die.