Embedded Die Package with Copper Pillars for Thin Packaging
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Solution Overview
Problem
Current chip packaging technologies face challenges in achieving thin, reliable, and cost-effective solutions, particularly for single-layer packages, which often suffer from warping, unreliability, and high manufacturing costs due to limitations in lead frame technology and via post approaches.
Innovation Solution
The development of an embedded die package with aluminum die contact pads in a passivation layer, coupled to a feature layer with copper pillars encapsulated in a dielectric material, which are then used to create a grid array of pads for coupling to substrates, employing a method involving adhesion/barrier layers, electroplating, and dielectric lamination to form Land Grid Array (LGA) or Ball Grid Array (BGA) configurations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If lead frame technology is used for chip packaging, then mechanical support and electrical connection are provided, but the package thickness increases and warping resistance is compromised
Solution Approach 1:
The patent extracts the essential functions of the lead frame (mechanical support and electrical connection) and separates them into distinct components: a thin substrate providing mechanical support, and separate copper pillars providing electrical connection. This eliminates the need for a thick lead frame structure while maintaining both functions independently, thereby reducing overall package thickness while preserving warping resistance.
Solution Approach 2:
The patent segments the integrated lead frame structure into separate functional elements: the substrate, copper pillars, and bonding pads are distinct components rather than a monolithic structure. This segmentation allows each component to be optimized independently for its specific function, enabling the substrate to remain thin for warping resistance while copper pillars provide necessary electrical pathways without adding excessive thickness.
2Reliability
If via posts are used to create electrical connections through dielectric material, then electrical connectivity is achieved, but manufacturing complexity and cost increase
Solution Approach 1:
The patent applies preliminary action by forming copper pillars directly on the substrate surface before applying the dielectric material, rather than creating vias through the dielectric afterward. The copper pillars are prepared in advance with proper adhesion and barrier layers, then the dielectric is laminated over them. This preliminary formation simplifies manufacturing by eliminating complex via drilling, filling, and planarization steps, reducing both cost and complexity while maintaining reliable electrical connections.
3Reliability
If wire bonding is used to connect die to leads, then electrical connection is established, but the risk of wire breakage and shorting increases
Solution Approach 1:
The patent extracts and eliminates the wire bonding process entirely by providing direct electrical pathways through copper pillars that extend from the die bonding pads through the dielectric to external connection points. This removes the intermediate wire bonds that are susceptible to breakage and shorting, replacing them with robust, rigid copper structures that are inherently more reliable and resistant to harmful factors.
4Reliability
If multilayer substrate structures are fabricated with multiple copper layers and vias, then electrical performance is improved, but device complexity increases
Solution Approach 1:
The patent applies partial action by implementing only the essential electrical connection layers needed for the specific application, rather than fabricating complete multilayer structures with multiple copper layers and vias. The solution uses a single copper pillar layer extending through the dielectric, which provides sufficient electrical performance for many applications without the complexity of multiple stacked layers, achieving the right amount of electrical functionality without excessive structural complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution provides a robust, thin, and cost-effective chip packaging method that enhances reliability and heat dissipation, while reducing the risk of wire breakage and shorting, and allows for efficient electrical connections with improved thermal management.
Implementation Method 1
depositing an adhesion/barrier layer onto the die contact pads
Implementation Method 2
employing a method involving adhesion/barrier layers, electroplating, and dielectric lamination
Implementation Method 3
employing a method involving adhesion/barrier layers, electroplating, and dielectric lamination
Data Source
AI summary
An embedded die package comprising a die having die contract pads in a passivation layer, the die contact pads being coupled to a first side of a feature layer by an adhesive layer, a layer of pillars extending from a second side of the feature layer, the die, feature layer and the layer of pillars being encapsulated by a dielectric material.