Embedded Die Package Lamination to Minimize Warpage and Delamination
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Solution Overview
Problem
Conventional semiconductor packaging methods face challenges such as misalignment, warpage, delamination, and roughened surfaces due to mismatched coefficients of thermal expansion and the use of conventional insulating materials, which affect the electrical characteristics and reliability of semiconductor devices.
Innovation Solution
The use of a prefabricated reinforced laminating insulating film and conductive layers, applied using vacuum lamination and metal deposition processes, to embed and support semiconductor die without forming insulating layers over the die, reducing process steps and improving structural stability and adhesion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional insulating materials and mold injection processes are used to embed semiconductor die, then the packaging process can be completed, but misalignment, warpage, and delamination occur due to mismatched coefficients of thermal expansion
Solution Approach 1:
The patent changes the material parameter (coefficient of thermal expansion) by selecting a substrate material whose CTE matches that of the semiconductor die. This parameter matching eliminates thermal expansion mismatch during molding, preventing warpage and delamination while maintaining manufacturing feasibility
Solution Approach 2:
The patent introduces a substrate as an intermediary layer between the semiconductor die and the molding compound. This substrate acts as a stable foundation that prevents misalignment and warpage during the molding process, resolving the contradiction between ease of manufacture and manufacturing precision
2Ease of manufacture
If conventional mold injection is used to embed semiconductor die in encapsulant, then packaging can be achieved, but roughened surfaces are created around the embedded die
Solution Approach 1:
The patent performs preliminary embedding of the semiconductor die into the substrate before the molding process. This preliminary action positions the die securely and protects it during molding, preventing the roughened surface defect while maintaining ease of manufacture
Solution Approach 2:
The substrate serves as an intermediary that protects the semiconductor die during mold injection. By embedding the die in the substrate first, the substrate shields the die from direct contact with the molding compound, preventing surface roughening while allowing the packaging process to proceed
3Productivity
If semiconductor die are embedded in encapsulant over temporary carrier, then reconfigured wafer can be formed, but carrier removal is required adding process complexity
Solution Approach 1:
The patent extracts and eliminates the temporary carrier from the packaging process by directly embedding the semiconductor die into the substrate. This removal of the carrier step simplifies the overall process, reducing device complexity while maintaining productivity in forming reconfigured wafers
4Ease of manufacture
If build-up interconnect structure is formed over exposed semiconductor die, then electrical redistribution is achieved, but misalignment occurs due to die shifting during encapsulation
Solution Approach 1:
The patent performs preliminary embedding of the semiconductor die into the substrate before forming the build-up interconnect structure. This preliminary embedding stabilizes the die position, preventing shifting during encapsulation, and ensures accurate alignment of the interconnect structure with the die while maintaining ease of electrical redistribution
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the structural stability and electrical performance of semiconductor packages by minimizing warpage, delamination, and surface imperfections, leading to improved signal transmission and reduced manufacturing costs.
Implementation Method 1
applied using vacuum lamination and metal deposition processes
Implementation Method 2
applied using vacuum lamination and metal deposition processes
Data Source
AI summary
A semiconductor device has a plurality of semiconductor die. A first prefabricated insulating film is disposed over the semiconductor die. A conductive layer is formed over the first prefabricated insulating film. An interconnect structure is formed over the semiconductor die and first prefabricated insulating film. The first prefabricated insulating film is laminated over the semiconductor die. The first prefabricated insulating film includes glass cloth, glass fiber, or glass fillers. The semiconductor die is embedded within the first prefabricated insulating film with the first prefabricated insulating film covering first and side surfaces of the semiconductor die. The interconnect structure is formed over a second surface of the semiconductor die opposite the first surface. A portion of the first prefabricated insulating film is removed after disposing the first prefabricated insulating film over the semiconductor die. A second prefabricated insulating film is disposed over the first prefabricated insulating film.