Embedded Die Package Structure with Leadframe and Insulating Core

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Solution Overview

Problem

Conventional embedded die package structures face issues with workability guarantees, misalignment, and reliability due to the complexity of embedding dies into substrates, which often results in warped substrates and disconnected components.

Innovation Solution

A package structure with an embedded die is developed, featuring a core layer with a leadframe and dielectric layers, where the die is electrically connected to the leadframe using various bonding techniques, and conductive vias ensure electrical connectivity, allowing for pre-embedding electrical inspection and rework, along with oxidation-resistant layers and solder masks for enhanced reliability and flexibility.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If dies are embedded into substrates using conventional methods, then wiring area is increased and products are miniaturized, but workability cannot be guaranteed and misalignment occurs

Engineering Contradiction:
Improveproduct sizeVSAvoidworkability guarantee
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

The patent applies preliminary action by forming holes and filling them with insulating material before embedding the dies. This preparatory step creates a stable foundation that ensures proper positioning and workability, preventing misalignment issues that occur in conventional direct embedding methods.

Inventive Principle:
Principle #10Preliminary action

2Area of stationary object

If dies are embedded into substrates, then wiring area is increased, but rework opportunities are eliminated when misalignment occurs

Engineering Contradiction:
Improvewiring areaVSAvoidrework capability
Core Design Contradiction:
Area of stationary objectVSEase of repair

Solution Approach 1:

The patent segments the embedding process into distinct stages: hole formation, insulating material filling, and die embedding. This segmentation allows for inspection and potential rework at intermediate stages, particularly after hole formation and before final die placement, maintaining ease of repair while achieving increased wiring area.

Inventive Principle:
Principle #1Segmentation

3Volume of moving object

If substrate is warped during embedding, then compactness is achieved, but bumps on dies may come off from circuit layers

Engineering Contradiction:
Improvepackage sizeVSAvoidbump connection reliability
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

The patent applies beforehand cushioning by filling the holes with insulating material before embedding the dies. This cushioning layer compensates for substrate warping and provides a stable interface that prevents bumps from coming off, ensuring reliable electrical connections while maintaining compact packaging.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

4Reliability

If multiple circuit layers are added to ensure electrical connectivity, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improveelectrical connectivityVSAvoidnumber of circuit layers
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces an intermediary approach by using conductive vias to establish electrical connections through the insulating material filling, rather than relying on multiple complex circuit layers. This intermediary connection method achieves reliable electrical connectivity while minimizing the number of circuit layers required.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach ensures the workability of the die, allows for precise rework, reduces the risk of electrical disconnection, and minimizes the number of circuit layers, thereby improving the reliability and cost-effectiveness of the package structure.

Implementation Method 1

the die is electrically connected to the leadframe through performing a wire-bonding technique

Methodology Applied
Scientific EffectWire-bonding: Welding

Implementation Method 2

performing a flip-chip (F/C) bonding technique

Methodology Applied
Scientific EffectFlip-chip bonding: Welding

Implementation Method 3

using anisotropic conductive films (ACFs)

Methodology Applied
Scientific EffectConductive film conduction: Conduction (electrical)

Implementation Method 4

performing an ultrasonic-wave bonding technique

Methodology Applied
Scientific EffectUltrasonic bonding: Ultrasonic Vibration

Implementation Method 5

a plurality of conductive vias disposed in the first dielectric layer, such that the leadframe is electrically connected to the first signal layer and the second signal layer

Methodology Applied
Scientific EffectConductive via conduction: Conduction (electrical)

Data Source

PatentUS8120148B2Package structure with embedded die and method of fabricating the same
Publication Date: 2012.02.21 ADVANCED SEMICON ENG INC
  • US8120148B2 patent drawing
  • US8120148B2 patent drawing
  • US8120148B2 patent drawing

AI summary

A package structure with an embedded die includes a core layer, a first build-up wiring structure, and a second build-up wiring structure. The core layer has a first surface and a second surface opposite thereto. Besides, the core layer includes a first dielectric layer, a leadframe, a die, a first signal layer, and a second signal layer. The die is disposed on and electrically connected to the leadframe. The die and the leadframe are embedded in the first dielectric layer. The first signal layer is disposed on an upper surface of the first dielectric layer and electrically connected to the leadframe. The second signal layer is disposed on a bottom surface of the first dielectric layer and electrically connected to the leadframe. The first and the second build-up wiring structures are disposed on the first and the second surfaces of the core layer, respectively.