Embedded Die Package Assembly with Reinforced Plate Cavity
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Solution Overview
Problem
Integrated circuit (IC) package assemblies face challenges in small form factor devices due to height limitations, increased assembly costs and complexity, and thermal stress-related defects from coefficient of thermal expansion mismatches between dies and substrates in current package-on-package configurations.
Innovation Solution
A package assembly that includes a die attach layer, a reinforced plate with a cavity to embed the die, and a laminate layer with prepreg material for encapsulation, using laser via joints to reduce thermal stress and eliminate the need for a separate interposer, thereby reducing package height and assembly complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an interposer is used to couple package substrates in PoP configuration, then electrical connectivity between packages is achieved, but package height increases
Solution Approach 1:
The patent merges the interposer functionality directly into the package substrate by integrating embedded conductive interconnects within the substrate layers. This eliminates the need for a separate interposer component while maintaining electrical connectivity between stacked packages, thereby reducing overall package height.
Solution Approach 2:
The conductive interconnects are nested within the package substrate layers themselves, with conductive traces and vias embedded between functional layers. This nesting approach integrates the interconnection function within the substrate structure, eliminating external interposers and reducing z-height.
2Length of moving object
If a thin coreless substrate is used for processor package, then package height is reduced, but structural rigidity decreases requiring fixture jigs
Solution Approach 1:
The package substrate uses composite material construction with multiple functional layers including conductive layers, insulating layers, and reinforcement structures. This composite approach provides the necessary structural rigidity for thin substrates, eliminating the need for fixture jigs during assembly while maintaining reduced height.
Solution Approach 2:
The substrate incorporates arched or curved reinforcement structures that span between support points, providing enhanced structural rigidity through geometric curvature. This arch design allows thin substrates to maintain stiffness without requiring external fixtures during assembly.
3Reliability
If high temperature thermal process is used to couple die with substrate, then solderable material bonding is achieved, but thermal stress defects occur due to CTE mismatch
Solution Approach 1:
The patent changes the bonding parameters by using lower temperature processes such as eutectic solder reflow at controlled temperatures, or alternative bonding methods like adhesive bonding or direct copper-to-copper diffusion bonding. These parameter changes reduce thermal stress and prevent warpage while achieving reliable die-to-substrate bonding.
Solution Approach 2:
The substrate and die structures incorporate localized CTE-matched materials in critical bonding regions. By using materials with matched coefficients of thermal expansion at the die attach interface, the patent reduces thermal stress concentration during temperature cycling while maintaining overall assembly integrity.
4Adaptability or versatility
If multiple separate components (die, interposer, substrate) are used in PoP configuration, then functional integration is achieved, but assembly cost and complexity increase
Solution Approach 1:
The patent combines multiple previously separate components (die, interposer, substrate) into an integrated package substrate structure where conductive interconnects are embedded within the substrate layers. This merging reduces the number of discrete components and assembly steps while maintaining full functional integration between processor and memory packages.
Data Source
AI summary
Embodiments of the present disclosure are directed towards a package assembly for embedded die and associated techniques and configurations. In one embodiment, an apparatus includes a package assembly comprising a die attach layer, a die coupled with the die attach layer, the die having an active side including active devices of the die and an inactive side disposed opposite to the active side, a reinforced plate coupled with the die attach layer, the reinforced plate having a first side and a second side disposed opposite to the first side and a cavity disposed in the reinforced plate and one or more build-up layers coupled with the second side of the reinforced plate, the one or more build-up layers including an insulator and conductive features disposed in the insulator, the conductive features being electrically coupled with the die, wherein the inactive side of the die is in direct contact with the die attach layer, the first side of the reinforced plate is in direct contact with the die attach layer and the die is disposed in the cavity. Other embodiments may be described and/or claimed.