Embedded Die Stack Substrate for Semiconductor Package Thickness Reduction
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Solution Overview
Problem
Conventional semiconductor package structures face limitations in reducing thickness due to the cumulative thickness of stacked packages, hindering advancements in consumer electronics such as mobile phones in terms of performance, power efficiency, and size reduction.
Innovation Solution
A thinned semiconductor package structure is achieved by attaching a die stack to a substrate with an opening, where the substrate's thickness is adjusted to match the die stack's thickness, allowing for further thickness reduction through careful alignment and adhesive layer formation, followed by circuit layer formation and passivation, enabling a more compact package-on-package design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If conventional package-on-package structure is used, then functional integration is achieved, but thickness cannot be reduced below the sum of substrate and die thicknesses
Solution Approach 1:
The die stack is nested within a recess formed in the substrate, allowing the die stack to be partially embedded in the substrate rather than sitting on top of it. This nesting arrangement reduces the overall package thickness by utilizing the substrate volume, while maintaining the functional integration of multiple dies through the stack configuration.
Solution Approach 2:
The invention transitions from a conventional planar package structure to a three-dimensional structure with a recess. By creating a vertical dimension in the substrate (the recess depth), the package achieves reduced thickness without compromising the integration of multiple dies. The recess provides an additional spatial dimension for accommodating the die stack.
2Length of moving object
If substrate thickness is reduced to achieve thinner package, then package thickness decreases, but structural strength and reliability may be compromised
Solution Approach 1:
The die stack is nested within a recess formed in the substrate, allowing the die stack to be partially embedded in the substrate rather than sitting on top of it. This nesting arrangement reduces the overall package thickness by utilizing the substrate volume, while maintaining the functional integration of multiple dies through the stack configuration.
Solution Approach 2:
The invention transitions from a conventional planar package structure to a three-dimensional structure with a recess. By creating a vertical dimension in the substrate (the recess depth), the package achieves reduced thickness without compromising the integration of multiple dies. The recess provides an additional spatial dimension for accommodating the die stack.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in a semiconductor package that is approximately 200 μm thinner than conventional designs, enhancing performance and power efficiency while reducing size, addressing the thickness limitations of traditional package-on-package structures.
Implementation Method 1
a second adhesive layer is formed on the second side of the substrate and between the substrate and the die stack
Data Source
AI summary
A semiconductor package structure and a method for manufacturing the same are provided. The semiconductor package structure has a substrate and a die stack of n die(s), wherein n≧1. The substrate has a first side, a second side and an opening extending from the first side to the second side. The die stack is disposed in the opening. The thickness of the substrate is substantially the same as the thickness of the die stack.