Embedded-Diode ESD Layout for High Tolerance in Less Chip Area
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Solution Overview
Problem
Conventional electrostatic discharge protection devices for integrated circuits require large device sizes to withstand high-voltage tests, occupying significant chip area and not efficiently integrating with existing manufacturing processes.
Innovation Solution
An electrostatic discharge protection device with a gate structure, first and second doped regions of different conductivity types, and embedded diodes that are directly connected to transistors, allowing for enhanced negative human body discharge mode and reduced chip area usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional electrostatic discharge protection devices are designed to withstand high-voltage ESD tests, then the ESD tolerance is improved, but the device size increases and occupies large chip area
Solution Approach 1:
The patent combines the ESD protection function with the existing transistor structure by integrating embedded diodes directly into the transistor layout. The gate structure with extension parts and doped regions are merged to form both the transistor channel and the protective diode structures, allowing dual functionality from a single integrated device that occupies reduced chip area.
Solution Approach 2:
The embedded diodes are nested within the transistor structure itself. The diode structures are positioned inside or overlapping with the transistor's active regions, sharing common doped regions and gate structures. This nesting approach allows the protection function to be embedded within the functional transistor without requiring additional external protection devices.
2Reliability
If conventional ESD protection devices are designed to withstand high-voltage tests, then the negative human body discharge mode is improved, but the device complexity increases
Solution Approach 1:
The gate structure with extension parts serves multiple functions simultaneously: it forms the transistor gate for normal operation and creates the embedded diode structures for ESD protection. The same doped regions serve dual purposes as both transistor source/drain regions and diode junctions. This multi-functionality eliminates the need for separate protection devices and reduces overall structural complexity.
Solution Approach 2:
The patent merges the transistor functional structure with the ESD protection structure into a unified design. The extension parts of the gate and the associated doped regions are combined to form both the transistor channel and the protective diode clamping structures, reducing device complexity while enhancing negative human body discharge capability.
Data Source
AI summary
An electrostatic discharge device including a gate structure, a plurality of first doped regions, and a plurality of second doped regions. The gate structure is disposed on a substrate. The gate structure includes a body part and a plurality of extension parts. The extension parts are connected with the body part, and an extension direction of the body part is different from an extension direction of the extension parts. The first doped regions are located in the substrate between the extension parts. The second doped regions are located in the substrate at two outer sides of the extension parts. The first doped regions and the second doped regions have different conductivity types.