Embedded Electrode Charge Balance in Semiconductor Devices

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Solution Overview

Problem

Conventional semiconductor devices face challenges in accurately controlling charge balance between semiconductor layers and column layers, which restricts impurity concentration and cell pitch, thereby limiting recovery properties and carrier mobility.

Innovation Solution

A semiconductor device configuration with an embedded electrode in the column layer, allowing voltage control to manage charge balance, reducing the need for precise impurity concentration and cell pitch adjustments, and enhancing recovery properties by increasing impurity concentration while maintaining charge balance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If impurity concentration and cell pitch are accurately controlled to secure charge balance, then charge balance is maintained, but manufacturing complexity and restrictions on design parameters increase

Engineering Contradiction:
Improvecharge balance controlVSAvoiddesign parameter restrictions
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The invention changes the control parameter from impurity concentration and cell pitch to column layer thickness. By controlling the thickness of the column layer (e.g., 0.5-5.0 μm), the charge amount in the column layer can be directly adjusted to match the semiconductor layer charge, simplifying the charge balance control process and reducing design parameter restrictions

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The invention segments the charge balance control into two independent parts: the semiconductor layer charge (determined by impurity concentration and area) and the column layer charge (determined by thickness and conductivity type). This segmentation allows independent optimization of each layer without requiring precise coordination of multiple parameters

Inventive Principle:
Principle #1Segmentation

2Speed

If impurity concentration is increased to improve carrier mobility, then carrier mobility improves, but charge balance is disrupted

Engineering Contradiction:
Improvecarrier mobilityVSAvoidcharge balance
Core Design Contradiction:
SpeedVSManufacturing precision

Solution Approach 1:

The invention enables independent adjustment of carrier mobility (through semiconductor layer impurity concentration) and charge balance (through column layer thickness). This decoupling allows the semiconductor layer impurity concentration to be increased for higher carrier mobility without compromising charge balance, as the column layer thickness can be adjusted to compensate

Inventive Principle:
Principle #35Parameter changes

3Area of moving object

If cell pitch is reduced to increase device density, then device density increases, but charge balance control becomes more difficult

Engineering Contradiction:
Improvedevice densityVSAvoidcharge balance control
Core Design Contradiction:
Area of moving objectVSManufacturing precision

Solution Approach 1:

The invention shifts the charge balance control parameter from cell pitch to column layer thickness. This allows cell pitch to be reduced for higher device density while maintaining charge balance through appropriate adjustment of column layer thickness, which is independent of the cell pitch

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10720525B2Semiconductor device
Publication Date: 2020.07.21 ROHM CO LTD
  • US10720525B2 patent drawing
  • US10720525B2 patent drawing
  • US10720525B2 patent drawing

AI summary

A semiconductor device includes: a semiconductor layer of a first conductive type having a first surface and a second surface opposite to the first surface; a body region of a second conductive type selectively formed on the first surface of the semiconductor layer; a source region of the first conductive type formed inside the body region; a gate electrode opposing part of the body region via a gate insulating film; a column layer of the second conductive type formed at the second surface side with respect to the body region; an embedded electrode embedded in the column layer such that the embedded electrode is electrically isolated from the column layer; and a first electrode electrically connected to the embedded electrode.