Embedded Gate High-Voltage Semiconductor Structure
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Solution Overview
Problem
Conventional high-voltage semiconductor devices face challenges in miniaturization as they experience a decrease in drain-to-source ON resistance (Rdson) while degrading breakdown voltage, especially in smaller devices, which affects their performance and reliability.
Innovation Solution
A semiconductor structure is fabricated with a gate electrode embedded in the substrate, forming a high-voltage well region and drain drift regions, allowing for reduced device size without compromising breakdown or threshold voltage, and is compatible with existing HV device processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the dimensions of high-voltage semiconductor devices are scaled down, then the drain-to-source ON resistance decreases, but the breakdown voltage degrades
Solution Approach 1:
The gate electrode is moved from a planar surface position to an embedded position within the substrate, transitioning from a two-dimensional surface structure to a three-dimensional embedded structure. This dimensional change allows the gate to be positioned deeper in the substrate, enabling better control over the channel while maintaining breakdown voltage characteristics even as device dimensions are scaled down.
Solution Approach 2:
The gate electrode is nested within the substrate by forming a trench and embedding the gate structure inside it. This nesting approach allows the gate to be integrated into the substrate volume rather than occupying surface area, enabling device miniaturization while preserving the electrical characteristics needed for high breakdown voltage.
2Length of moving object
If the device size is reduced, then the drain-to-source ON resistance drops, but the breakdown voltage deteriorates
Solution Approach 1:
By embedding the gate electrode in the substrate, the invention transitions from a surface-level gate structure to a three-dimensional embedded structure. This allows the gate length to be effectively reduced for miniaturization while the vertical positioning within the substrate maintains the electric field control necessary for high breakdown voltage.
Solution Approach 2:
The embedded gate structure creates locally optimized electrical fields in different regions of the device. The gate electrode positioned within the substrate provides enhanced control over the channel region while the surrounding substrate material maintains the breakdown characteristics, allowing simultaneous reduction in device size and maintenance of high breakdown voltage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The embedded gate structure reduces Rdson by more than 25% and maintains breakdown and threshold voltages, enabling miniaturization while maintaining performance, and is applicable to various high-voltage devices like DDMOS, LDMOS, and EDMOS.
Implementation Method 1
implanting the substrate to form a high-voltage well (HVW) region having a first conductivity type
Data Source
AI summary
A method for fabricating a semiconductor structure includes providing a substrate. The method further includes implanting the substrate to form a high-voltage well region having a first conductivity type. The method further includes forming a pair of drain drift regions in the high-voltage well region. The pair of drain drift regions are on the front side of the substrate, and the pair of drain drift regions have a second conductivity type opposite to the first conductivity type. The method further includes forming a gate electrode embedded in the high-voltage well region. The gate electrode is positioned between the pair of drain drift regions and laterally spaced apart from the pair of drain drift regions.