Embedded Gate Trench MOSFET for Low Cgd and RDSON
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Power MOSFETs face challenges in achieving low gate-to-drain capacitance (Cgd) and drain-to-source resistance (RDSON) while maintaining efficient manufacturability, as trench MOSFETs have high Cgd and lateral MOSFETs have higher RDSON.
Innovation Solution
A semiconductor device with a trench structure that includes a vertical drift region, a channel region, and a gate structure embedded within the trench, self-aligned to the channel region, which reduces parasitic capacitance and enhances current flow, thereby minimizing Cgd and RDSON.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the trench structure is modified to improve Cgd, then manufacturing complexity increases
Solution Approach 1:
The gate structure is formed within the trench during the trench formation process itself, rather than requiring separate subsequent steps. The trench is etched to the appropriate depth, and the gate is deposited and patterned in-place within the trench structure, eliminating the need for additional alignment steps and reducing manufacturing complexity
Data Source
AI summary
A semiconductor device has a substrate and trench formed partially through the substrate. A drain region is formed in the substrate as a second surface of the substrate. An epitaxial region is formed in the substrate over the drain region. A vertical drift region is formed along a sidewall of the trench. An insulating material is deposited within the trench. A channel region is formed along the sidewall of the trench above the insulating material. The channel region is separated from the insulating material. A gate structure is formed within the trench adjacent to the channel region. The gate structure includes an insulating layer formed along the sidewall of the trench adjacent to the channel region and polysilicon layer formed within the trench over the insulating layer. A source region is formed in a first surface of the substrate contacting the channel region.