Embedded Heat Spreader for 3DIC Thermal Management
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Solution Overview
Problem
The increasing packaging density and higher power consumption in microelectronic devices, such as 3DIC packages, lead to thermal constriction issues between memory chips and logic chips, resulting in localized heat generation "hot spots" that can cause electrical performance degradation and device failure.
Innovation Solution
A thermally enhanced heat spreader is embedded in a substrate, utilizing a thermal interface material between the heat spreader and the die to improve thermal conductivity, and a two-phase vaporizable liquid within a vapor chamber to efficiently dissipate heat, along with a heat spreader design that includes a lid with low thermal expansion materials and a wick layer to facilitate heat transfer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If packaging density is increased to satisfy demand for smaller electronic devices, then device size is reduced, but thermal constriction issues occur between chips leading to hot spots
Solution Approach 1:
The patent introduces through-substrate vias that extend vertically through the substrate in the third dimension, creating thermal pathways from the hot spots on chip surfaces down to heat dissipation structures below the substrate. This vertical thermal management dimension resolves the thermal constriction problem caused by increased packaging density while maintaining compact device footprint.
Solution Approach 2:
The patent employs thermal interface materials as intermediaries between the chips and the substrate, and between the substrate and external heat sinks. These intermediary layers facilitate efficient heat transfer from the hot spots through the substrate to external cooling structures, preventing temperature buildup while maintaining the high-density packaging configuration.
2Power
If higher power consumption circuits are used to accommodate more functionality, then device capability is improved, but heat generation increases causing performance degradation
Solution Approach 1:
The patent implements preliminary thermal management measures by integrating through-substrate via thermal pathways and external heat sinks before heat accumulation reaches critical levels. This proactive heat dissipation architecture prevents hot spots from forming and causing electrical performance degradation, allowing higher power consumption circuits to operate reliably.
3Temperature
If copper heat spreader is used on external surface, then thermal conductivity is improved, but thermal constriction remains between memory chip and logic chip
Solution Approach 1:
The patent segments the thermal management system into multiple independent pathways: through-substrate vias providing vertical heat evacuation routes, thermal interface materials at chip-substrate interfaces, and external heat sinks. This segmented approach addresses thermal constriction between specific chips (e.g., memory and logic chips) independently, rather than relying on a single external heat spreader that cannot resolve localized thermal bottlenecks.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively spreads thermal energy across a larger surface area, reducing temperature differences between components and maintaining devices within a desired operating temperature range, thereby enhancing the reliability and performance of microelectronic packages.
Implementation Method 1
a two-phase vaporizable liquid within a vapor chamber to efficiently dissipate heat
Implementation Method 2
a two-phase vaporizable liquid within a vapor chamber to efficiently dissipate heat
Implementation Method 3
utilizing a thermal interface material between the heat spreader and the die to improve thermal conductivity
Implementation Method 4
a wick layer to facilitate heat transfer
Data Source
AI summary
A three dimensional integrated circuit (3DIC) includes a first substrate and a heat spreading structure embedded in the first substrate. The 3DIC further includes a die electrically connected to the first substrate, wherein the die is thermally connected to the heat spreading structure. The 3DIC further includes a plurality of memory units on the die, wherein the die is between the plurality of memory units and the first substrate, and the plurality of memory units is thermally connected to the heat spreading structure by the die. The 3DIC further includes an external cooling unit on the plurality of memory units, wherein the plurality of memory units is between the die and the external cooling unit, and the die is thermally connected to the external cooling unit by the plurality of memory units.