Embedded IC Carrier for Semiconductor Package Warping and EMI
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Solution Overview
Problem
Current semiconductor package technologies face challenges in achieving miniaturization, high-density, and low-cost production due to thick lead frames, slow and costly laser drilling of glass fiber core carriers, and warping issues during thinning processes, which hinder the creation of fine-pitch and electromagnetic protection in low-pin-count packages.
Innovation Solution
An IC carrier with a dielectric layer and a patterned conductor layer, where the conductor layer is embedded and has exposed conductive pillars and wires, allowing for reduced thickness and cost, and utilizing manufacturing methods like photolithography, plating, and molding to create openings and protective layers for improved electromagnetic protection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If lead frame packaging technique is used, then the package structure is simple and easy to manufacture, but the lead frame thickness is large and cannot provide electromagnetic protection to the chip
Solution Approach 1:
The patent uses a composite structure combining a carrier board with dielectric material (such as BT, FR4, FR5, or ABF) and a lead frame. The dielectric material layer provides electromagnetic protection while the lead frame provides structural support and electrical connection, resolving the contradiction between manufacturing simplicity and electromagnetic protection capability.
2Reliability
If laser drilling is used to create holes in the carrier, then electrical connections can be established, but the processing speed is slow and the cost is high
Solution Approach 1:
The patent replaces the laser drilling process with a mechanical punching process to create through-holes in the carrier board. This substitution significantly improves processing speed and reduces costs while maintaining the electrical connection functionality, as the punched holes can then be filled with conductive material to establish reliable electrical paths.
3Volume of moving object
If the carrier is thinned to reduce size, then the package becomes more compact, but the carrier becomes prone to warping during the thinning process
Solution Approach 1:
The patent employs a composite structure with a dielectric material layer and a lead frame that work together to maintain carrier stability during thinning. The lead frame acts as a reinforcement skeleton that prevents warping even as the overall carrier thickness is reduced, enabling compact packaging while maintaining structural integrity.
Solution Approach 2:
The patent applies local reinforcement by strategically positioning the lead frame structure within the carrier board. The lead frame provides localized structural support at critical areas where warping would occur during thinning, allowing the rest of the carrier to be thinned for compactness while maintaining overall stability.
4Reliability
If glass fiber core dielectric material is used, then the carrier has good electrical insulation, but the laser drilling cost increases and aperture miniaturization becomes difficult
Solution Approach 1:
The patent replaces laser drilling with mechanical punching for creating holes in the glass fiber core dielectric material. This substitution overcomes the limitations of laser drilling on glass fiber materials, enabling cost-effective production and easier achievement of small aperture sizes while preserving the excellent electrical insulation properties of the glass fiber dielectric material.
Data Source
AI summary
The present invention discloses an IC Carrier of a semiconductor package and its manufacturing method. The IC Carrier of the semiconductor package includes a dielectric layer and a patterned conductor layer. The dielectric layer has at least one opening groove. The patterned conductor layer is embedded in the dielectric layer, wherein a part of the patterned conductor layer is as a conductive pillar, which has two exposed ends, and a part of the patterned conductor layer is as a conductive wire, which only has one exposed end.


