Embedded Inductor Structure for Compact Semiconductor LC Packaging
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Solution Overview
Problem
The increasing integration density of semiconductor devices requires compact packaging technologies that can efficiently connect and power integrated circuit dies while maintaining high reliability and low contact resistance.
Innovation Solution
A semiconductor package with an embedded inductor and capacitors in the redistribution structure forms an LC circuit, reducing signal path length and parasitic impedance, and using a magnetic core to enhance inductance, thereby increasing power efficiency and communication bandwidth.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If traditional packaging technology is used, then device integration density is limited, but package size becomes large
Solution Approach 1:
The patent merges the inductor, capacitors, and power management circuitry into a single integrated structure within the redistribution layer. The inductor windings are formed using conductive lines in the redistribution layer, and capacitors are integrated by forming conductive plates within the same layer structure, eliminating the need for separate discrete components and reducing overall package size while maintaining high integration density
Solution Approach 2:
The patent implements a nested structure where the inductor windings are formed within the redistribution layer structure, with capacitive elements nested within the same layer. The conductive lines forming the inductor windings are embedded within dielectric material, and capacitor plates are positioned within the same redistribution layer, creating a compact nested arrangement that maximizes integration density within a small footprint
2Speed
If signal path length is reduced, then communication bandwidth increases, but parasitic impedance becomes more significant
Solution Approach 1:
The patent applies local quality by creating a low-impedance path specifically for high-frequency signals through the integrated LC circuit. The inductor and capacitor are positioned in close proximity within the redistribution layer, forming a localized resonant circuit that provides a preferred current path for RF signals. This localized structure minimizes the signal path length for high-frequency communication while the carefully designed L and C values compensate for parasitic effects, maintaining low overall impedance at the operating frequency
3Loss of energy
If power efficiency is increased, then energy consumption decreases, but device complexity increases
Solution Approach 1:
The patent implements multi-functionality by using the same redistribution layer structure to perform multiple functions: signal routing, power delivery, and LC filter operation. The conductive lines that normally serve as interconnects are configured to form inductor windings, and dielectric regions that provide electrical isolation also serve as capacitor dielectric material. This universal use of existing structures for multiple purposes achieves power efficiency improvements without adding significant structural complexity
Solution Approach 2:
The patent applies self-service by using the existing redistribution layer materials and structures to form the LC circuit components. The conductive lines already present in the redistribution layer are patterned to form inductor windings, and the dielectric material already providing electrical isolation is utilized as the capacitor dielectric. This self-service approach allows the structure to serve itself by converting existing elements into functional LC components, reducing power loss without requiring additional complex structures
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides a compact, high-reliability semiconductor package with improved power efficiency and communication bandwidth by integrating an inductor and capacitors in the redistribution structure, reducing signal path length and parasitic impedance, and enhancing inductance with magnetic cores.
Implementation Method 1
using a magnetic core to enhance inductance
Data Source
AI summary
A structure includes a first via and a first conductive line embedded in a first dielectric layer and spaced apart from each other by the first dielectric layer. A first metal pattern disposed on the first via and embedded in a second dielectric layer. A first conductive via disposed on the first conductive line and embedded in the second dielectric layer. The first metal pattern and the first conductive via are spaced apart from each other and are located on a first horizontal level, and the first metal pattern has an open ring shape. A second via disposed on the first metal pattern and embedded in a third dielectric layer. An inductor structure including the first via, the first metal pattern, and the second via.