Embedded Inductor PCB Design for Warping and Flux Leakage
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Solution Overview
Problem
Existing printed circuit boards face challenges in integrating inductors with multiple coil layers without increasing the number of insulation layers, which can lead to warping and reduced inductance values due to imbalance in conductor circuit volumes and external magnetic flux leakage.
Innovation Solution
A printed circuit board design that incorporates a core substrate with a built-in electronic component including an inductor and passive components, utilizing a filler resin to fill the space between the substrate and the component, and alternating resin insulation and coil layers connected by via conductors, which maintains equal insulation and conductive layers on both surfaces to prevent warping and enhance inductance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the number of insulation layers is increased to accommodate inductors with multiple coil layers, then the inductance value can be maintained, but the board thickness increases and warping occurs
Solution Approach 1:
The patent transitions from a planar arrangement of coil layers to a three-dimensional stacked configuration within the insulation substrate. Multiple coil layers are arranged in the thickness direction (Z-axis) rather than spreading them out in the plane, allowing high inductance values without increasing board thickness. This vertical stacking enables the inductor to achieve required inductance while maintaining a thin profile and reducing warping.
2Reliability
If the number of insulation layers is increased to accommodate inductors with multiple coil layers, then the inductance value can be maintained, but the device complexity increases
Solution Approach 1:
The patent merges the coil layers and insulation layers into a single integrated inductor component manufactured as one piece. The insulation substrate simultaneously provides mechanical support, electrical insulation, and houses the coil windings. This integration eliminates the need for separate insulation layers between coil layers, reducing device complexity while maintaining high inductance values through the compact three-dimensional coil arrangement.
3Reliability
If the number of conductive layers is increased to accommodate inductors with multiple coil layers, then the inductance value can be maintained, but the board thickness increases
Solution Approach 1:
The patent embeds multiple coil layers nested within the thickness of the insulation substrate. The coil layers are positioned at different heights within the substrate, with via conductors connecting them vertically. This nesting arrangement allows multiple conductive paths to be packed into a small vertical space, achieving high inductance without increasing the overall board thickness.
4Length of stationary object
If inductors with multiple coil layers are integrated without increasing insulation layers, then the board thickness is reduced, but external magnetic flux leakage occurs
Solution Approach 1:
The patent uses a composite structure where the insulation substrate is formed from multiple layers of resin and reinforcement materials with different magnetic properties. The resin layers provide electrical insulation and structural support, while the reinforcement materials (such as glass fibers) provide mechanical strength. This composite construction allows the substrate to contain the magnetic flux generated by the coil layers, preventing external leakage while maintaining a thin profile.
Data Source
AI summary
A printed wiring board includes a core substrate having opening, an electronic component device accommodated in the opening of the substrate and including inductor and passive components, a wiring structure connecting the inductor and passive components in the electronic device, a filler resin body filling space formed between the substrate and electronic device in the opening of the substrate, a first buildup layer including a first interlayer insulation layer on first surface of the substrate, a first conductive layer on the first insulation layer, and a first via conductor in the first insulation layer, and a second buildup layer including a second interlayer insulation layer on second surface of the substrate on the opposite side of the first surface of the substrate, a second conductive layer on the second insulation layer, and a second via conductor in the second insulation layer.