Embedded Inductor Substrate Design for High Q Factor Packaging
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Solution Overview
Problem
Current inductor manufacturing methods for semiconductor devices face challenges in achieving high Q factor and low insertion loss in restricted spaces, with existing processes being complex and incompatible with air gap structures, and failing to support single chip packaging due to electromagnetic interference and inefficient design space utilization.
Innovation Solution
An inductor embedded in a substrate with a coil electrode formed in a linear or curved spiral shape, using a metal such as gold, silver, or copper, and an insulation layer made of low dielectric material, along with an external connection pad, simplifies the manufacturing process and enhances solidity, allowing for high inductance and low insertion loss, and enables single chip packaging.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a metal layer of at least 3 μm thickness is deposited on the top layer to form inductors, then the inductors can be formed, but the area required exceeds 300 μm×300 μm which cannot be used for other circuits due to electromagnetic interference
Solution Approach 1:
The patent transitions from planar inductor structures to three-dimensional embedded structures by forming coil electrodes within holes etched into the substrate. This vertical integration allows inductors to occupy substrate volume rather than only surface area, achieving high inductance in a compact footprint while maintaining electromagnetic isolation through the substrate material.
Solution Approach 2:
The coil electrodes are nested within holes formed in the substrate, with insulation layers and connection pads integrated into the same structural volume. This nested configuration maximizes the use of available space by embedding passive components within the substrate rather than placing them on the surface, improving design space utilization.
2Reliability
If photoresist and copper with two or higher mask levels and exposure steps are used, then high-Q inductors can be formed, but the manufacturing process becomes complex and air gap structures are incompatible
Solution Approach 1:
The patent extracts the air gap structure from the inductor design and replaces it with solid coil electrodes embedded in the substrate. This eliminates the need for complex multi-mask photoresist processes and multiple exposure steps, simplifying the manufacturing process while maintaining high-Q performance through the embedded configuration.
Solution Approach 2:
The invention changes the structural parameter from air gap to solid embedded coil electrodes, and modifies the manufacturing parameters by using a simplified single-mask process with plating instead of multi-layer photoresist and multiple exposure steps. This parameter change reduces process complexity while achieving the desired electrical performance.
3Ease of operation
If wet etching is used to float the structure, then the structure can be released, but the structure adheres to the substrate
Solution Approach 1:
Instead of attempting to float and release the inductor structure from the substrate, the patent inverts the approach by embedding the coil electrodes directly into the substrate. The insulation layers and plating processes ensure proper electrical isolation and connection, eliminating the adhesion problem while maintaining structural solidity for single-chip packaging.
4Ease of manufacture
If general inductor structures are used, then manufacturing is straightforward, but they cannot embody single chip package due to electromagnetic interference and inefficient space utilization
Solution Approach 1:
The patent merges the inductor structure with the substrate by embedding coil electrodes within holes in the substrate. This integration combines the inductor with the packaging substrate into a unified structure, enabling single-chip packaging applications while maintaining manufacturing simplicity through processes like plating and insulation layer deposition.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves high inductance with improved design space utilization, simplifies the manufacturing process, and facilitates single chip packaging, enhancing the Q factor and reducing insertion loss while maintaining structural solidity.
Implementation Method 1
The coil electrode comprises metal, and fills a hole formed on the substrate
Implementation Method 2
an insulation layer made of low dielectric material
Data Source
AI summary
An inductor embedded in a substrate, including a substrate, a coil electrode formed by filling a metal in a spiral hole formed on the substrate, an insulation layer formed on the substrate, and an external connection pad formed on the insulation layer to be connected to the coil electrode. The inductor-embedded substrate can be used as a cap for a micro device package by forming a cavity on its bottom surface.


