Embedded Inlay Semiconductor Package for High Junction Temperatures
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Solution Overview
Problem
Wide bandgap semiconductor devices are limited by the use of mold compounds and joining materials designed for silicon operating conditions, which do not fully leverage the high temperature capabilities of these devices, leading to thermal limitations and reliability issues.
Innovation Solution
A molded semiconductor package design that includes a mold compound, a metal substrate, metal leads, an inlay with a semiconductor die embedded in an electrically insulating body, and a metal clip connecting the inlay to the leads, where the semiconductor die's maximum junction temperature exceeds the mold compound's glass transition temperature, and the insulating body's glass transition temperature is at or above the semiconductor die's maximum junction temperature.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If standard mold compounds designed for silicon technology are used to package wide bandgap semiconductor devices, then the packaging process is simple and compatible with existing manufacturing, but the junction temperature is limited below the thermal limit of the mold compound, preventing full utilization of wide bandgap capabilities
Solution Approach 1:
The packaging system is segmented into two distinct thermal zones: the mold compound for structural support and external protection, and the electrically insulating body for direct thermal management of the semiconductor die. This segmentation allows each material to be optimized for its specific function, enabling the die to operate at high temperatures while the mold compound remains within its thermal limits.
Solution Approach 2:
The electrically insulating body acts as an intermediary between the semiconductor die and the mold compound. It provides a thermal pathway that conducts heat away from the die while electrically isolating the high-temperature die from the lower-temperature mold compound, preventing thermal degradation of the mold compound.
2Ease of manufacture
If die size is reduced to make wide bandgap semiconductor technologies more cost-competitive, then manufacturing cost decreases, but junction temperature increases beyond the thermal limit for standard mold compounds
Solution Approach 1:
The electrically insulating body provides localized high-temperature capability directly at the semiconductor die interface, while the surrounding mold compound maintains its standard properties. This local quality enhancement allows small, high-power-density dies to operate at elevated temperatures without requiring the entire package material system to withstand those temperatures.
3Ease of manufacture
If standard joining materials such as AuSn diffusion bonds are used with high junction temperature wide bandgap semiconductor technologies, then the joining process is established and reliable for silicon, but severe reliability issues occur at high temperatures
Solution Approach 1:
The electrically insulating body serves as a thermal intermediary that decouples the temperature environments of the die and the mold compound. This thermal decoupling protects temperature-sensitive joining materials and interfaces from direct exposure to extreme die temperatures, maintaining joining reliability while enabling high-temperature die operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design allows for effective heat dissipation and prevents excessive heating of the mold compound, enabling the semiconductor die to operate at high temperatures without thermal failure, thus fully utilizing the capabilities of wide bandgap semiconductor technologies.
Implementation Method 1
the electrically insulating body has a glass transition temperature at or above the maximum junction temperature of the semiconductor die
Implementation Method 2
the metal substrate is attached to the first metal structure to form a primary thermal pathway for dissipating heat from the semiconductor die
Data Source
AI summary
A molded semiconductor package includes: a mold compound; a metal substrate partly embedded in the mold compound; at least one first metal lead partly embedded in the mold compound; an inlay embedded in the mold compound, the inlay comprising a semiconductor die embedded in an electrically insulating body, a first metal structure attached to a first side of the semiconductor die, and a second metal structure attached to a second side of the semiconductor die; and a metal clip at least partly embedded in the mold compound and connecting the second metal structure to the at least one first metal lead. The semiconductor die has a maximum junction temperature higher than a glass transition temperature of the mold compound, the electrically insulating body has a glass transition temperature at or above the maximum junction temperature of the semiconductor die, and the metal substrate is attached to the first metal structure.


