Embedded Interposer Package Structure for Thin, Warp-Resistant I/O
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Solution Overview
Problem
New packaging technologies for semiconductor dies face manufacturing challenges in achieving higher density and functionality while maintaining reduced package height and improved rigidity to prevent warpage.
Innovation Solution
The method involves embedding an interposer with different via pitch in a core substrate, allowing for mixed pitch vertical connections, increasing I/O terminals, and reducing package height by using a more rigid interposer substrate, which also enhances power delivery efficiency and prevents warpage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If a traditional semiconductor package structure is used, then manufacturing is simpler, but the package height is larger and density is lower
Solution Approach 1:
The interposer is embedded within the core substrate, creating a nested structure where one component is placed inside another. This nesting approach reduces the overall package height and increases density without requiring completely separate manufacturing processes, as the interposer integrates with existing substrate structures
Solution Approach 2:
The patent transitions from a planar package layout to a three-dimensional embedded structure by placing the interposer vertically within the core substrate. This dimensional change allows for higher I/O terminal density and better power delivery without proportionally increasing the package footprint
2Volume of moving object
If package height is reduced, then density improves, but rigidity decreases and warpage increases
Solution Approach 1:
The patent uses an interposer made of a rigid material (such as silicon or ceramic) that is embedded within the core substrate. This composite structure combines the low-profile advantage of reduced height with the high rigidity of the interposer material, preventing warpage while maintaining compact dimensions
Solution Approach 2:
The interposer is strategically placed in specific regions of the core substrate where rigidity is most needed, such as areas with high I/O terminal density or power delivery requirements. This localized reinforcement provides structural support without increasing overall package height
3Quantity of substance
If via pitch is uniform, then manufacturing is simpler, but I/O terminal density is lower
Solution Approach 1:
The patent implements mixed pitch configurations where different regions of the interposer have different via pitches. High-density regions use smaller pitch to accommodate more I/O terminals, while low-density regions use larger pitch for power delivery or signaling. This localized optimization increases total I/O count without requiring complete redesign of the entire package structure
Solution Approach 2:
The interposer is divided into multiple regions with different via pitch configurations, allowing independent optimization of each region for specific functions such as high-speed signaling, power delivery, or I/O connectivity. This segmentation enables higher overall terminal density while maintaining manufacturability through modular design
4Use of energy by moving object
If power delivery efficiency is improved, then performance increases, but package height may increase
Solution Approach 1:
The patent uses the vertical dimension within the core substrate to place power delivery structures (such as power vias or power traces) in three-dimensional configurations. This allows for shorter current paths and reduced impedance without increasing the package footprint, thereby improving power delivery efficiency while maintaining low profile
Data Source
AI summary
A semiconductor package structure includes first via structures formed through a core substrate. The structure also includes an interposer embedded in the core substrate between the first via structures. The interposer includes second via structures formed through an interposer substrate. The structure also includes a first redistribution layer structure formed over the core substrate. The structure also includes a second redistribution layer structure formed under the core substrate. The structure also includes a first encapsulating layer formed between a sidewall of the interposer and a sidewall of the core substrate.